gpu: nvgpu: add fecs_host_int_enable hal

This will be used to enable fecs interrupts per
chip.

Change-Id: Id99412ca1a9c4caad999c3458b0e9701515db4b9
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1642554
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
index 774afe56..157c567a 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
@@ -133,6 +133,7 @@ int gr_gv11b_pre_process_sm_exception(struct gk20a *g,
                 u32 gpc, u32 tpc, u32 sm, u32 global_esr, u32 warp_esr,
                 bool sm_debugger_attached, struct channel_gk20a *fault_ch,
                 bool *early_exit, bool *ignore_debugger);
+void gr_gv11b_fecs_host_int_enable(struct gk20a *g);
 int gr_gv11b_handle_fecs_error(struct gk20a *g,
                                 struct channel_gk20a *__ch,
                                 struct gr_gk20a_isr_data *isr_data);