gpu: nvgpu: gv11b: sw method for NVC397_SET_TEX_IN_DBG

Added sw method for NVC397_SET_TEX_IN_DBG with
following data fields:
data:0 PRI_TEX_IN_DBG_TSL1_RVCH_INVALIDATE
data:1 PRI_SM_L1TAG_CTRL_CACHE_SURFACE_LD
data:2 PRI_SM_L1TAG_CTRL_CACHE_SURFACE_ST

Bug 1934197

Change-Id: I0956d3f5c859ac23e16fb6b7372acd098dfb6d16
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master/r/1507479
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Wei Sun <wsun@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 5 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
index 9283a597..ff5782d9 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
@@ -39,6 +39,11 @@ enum {
 #define NVC397_SET_CIRCULAR_BUFFER_SIZE         0x1280
 #define NVC397_SET_ALPHA_CIRCULAR_BUFFER_SIZE   0x02dc
 #define NVC397_SET_GO_IDLE_TIMEOUT              0x022c
+#define NVC397_SET_TEX_IN_DBG                   0x10bc
+
+#define NVC397_SET_TEX_IN_DBG_TSL1_RVCH_INVALIDATE              0x1
+#define NVC397_SET_TEX_IN_DBG_SM_L1TAG_CTRL_CACHE_SURFACE_LD    0x2
+#define NVC397_SET_TEX_IN_DBG_SM_L1TAG_CTRL_CACHE_SURFACE_ST    0x4
 
 #define NVA297_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0