Revert "gpu: nvgpu: gv11b: enable RMW for gpu atomics"

The original change caused cuda atomic perf regression.

Bug 2310618

This reverts commit 10c3d4447d4206302f5d51695bf1f193255dd889.

Change-Id: Iea5391a89fdfadfb9a79cda57e71f1c9e87ca882
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1793880
(cherry picked from commit d0e51ddcb8139de70916335f124a80b8b588308b)
Reviewed-on: https://git-master.nvidia.com/r/1804945
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index aeb49982..0fbba3a0 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -4404,13 +4404,7 @@ void gr_gv11b_init_gpc_mmu(struct gk20a *g)
                 gr_gpcs_pri_mmu_ctrl_mmu_aperture_m() |
                 gr_gpcs_pri_mmu_ctrl_mmu_vol_m() |
                 gr_gpcs_pri_mmu_ctrl_mmu_disable_m();
-
-        temp = set_field(temp, gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(),
-                           gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_rmw_f());
         gk20a_writel(g, gr_gpcs_pri_mmu_ctrl_r(), temp);
-        nvgpu_log_info(g, "mmu_ctrl_r = 0x%08x, atomic_capability_mode_rmw",
-                        temp);
-
         gk20a_writel(g, gr_gpcs_pri_mmu_pm_unit_mask_r(), 0);
         gk20a_writel(g, gr_gpcs_pri_mmu_pm_req_mask_r(), 0);