diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2017-10-23 13:20:12 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-25 14:23:24 -0400 |
commit | c6ccb5f2a1e9a8999436f6c28ed5c416c5418ae3 (patch) | |
tree | dc1b7459c0a6c6d46ef2b0b3bd345c4522ae7e1e /drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |
parent | 0899e11d4bb630381607a0c245f72476e2e9209e (diff) |
gpu: nvgpu: gv11b: use scg perf for smid numbering
For SCG to work, smid numbering needs to be done
based on scg performance of tpcs. For gv11b and
gv11b vgpu, reuse gv100 function "gr_gv100_init_sm_id_table"
to do this.
Used local variable "index" to avoid multiple computations in
the function: gr_gv100_init_sm_id_table
index = sm_id + sm
Add deug info for printing initialized gpc/tpc/sm/global_tpc
indexs.
Bug 1842197
Change-Id: Ibf10f47f10a8ca58b86c307a22e159b2cc0d0f43
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1583916
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 154088d6..fc894908 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -2125,33 +2125,6 @@ void gr_gv11b_detect_sm_arch(struct gk20a *g) | |||
2125 | gr_gpc0_tpc0_sm_arch_warp_count_v(v); | 2125 | gr_gpc0_tpc0_sm_arch_warp_count_v(v); |
2126 | } | 2126 | } |
2127 | 2127 | ||
2128 | void gr_gv11b_init_sm_id_table(struct gk20a *g) | ||
2129 | { | ||
2130 | u32 gpc, tpc, sm; | ||
2131 | u32 sm_id = 0; | ||
2132 | u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); | ||
2133 | |||
2134 | /* TODO populate smids based on power efficiency */ | ||
2135 | for (tpc = 0; tpc < g->gr.max_tpc_per_gpc_count; tpc++) { | ||
2136 | for (gpc = 0; gpc < g->gr.gpc_count; gpc++) { | ||
2137 | |||
2138 | if (tpc >= g->gr.gpc_tpc_count[gpc]) | ||
2139 | continue; | ||
2140 | |||
2141 | for (sm = 0; sm < sm_per_tpc; sm++) { | ||
2142 | g->gr.sm_to_cluster[sm_id].tpc_index = tpc; | ||
2143 | g->gr.sm_to_cluster[sm_id].gpc_index = gpc; | ||
2144 | g->gr.sm_to_cluster[sm_id].sm_index = sm_id % 2; | ||
2145 | g->gr.sm_to_cluster[sm_id].global_tpc_index = | ||
2146 | tpc; | ||
2147 | sm_id++; | ||
2148 | } | ||
2149 | } | ||
2150 | } | ||
2151 | g->gr.no_of_sm = sm_id; | ||
2152 | nvgpu_log_info(g, " total number of sm = %d", g->gr.no_of_sm); | ||
2153 | } | ||
2154 | |||
2155 | void gr_gv11b_program_sm_id_numbering(struct gk20a *g, | 2128 | void gr_gv11b_program_sm_id_numbering(struct gk20a *g, |
2156 | u32 gpc, u32 tpc, u32 smid) | 2129 | u32 gpc, u32 tpc, u32 smid) |
2157 | { | 2130 | { |