gpu: nvgpu: gv11b: add gr ops for load tpc mask

gr_fe_tpc_fs_r addr is different for t19x

Change-Id: Ibae4b7224ffbd4d8366890cd05649b1b66e22f02
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1310327
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index a67b1476..c512322b 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -2005,6 +2005,11 @@ void gr_gv11b_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine)
         gk20a_writel(g, therm_gate_ctrl_r(engine), gate_ctrl);
 }
 
+static void gr_gv11b_load_tpc_mask(struct gk20a *g)
+{
+        /* TODO */
+}
+
 void gv11b_init_gr(struct gpu_ops *gops)
 {
         gp10b_init_gr(gops);
@@ -2061,5 +2066,6 @@ void gv11b_init_gr(struct gpu_ops *gops)
         gops->gr.write_zcull_ptr = gr_gv11b_write_zcull_ptr;
         gops->gr.write_pm_ptr = gr_gv11b_write_pm_ptr;
         gops->gr.init_elcg_mode = gr_gv11b_init_elcg_mode;
+        gops->gr.load_tpc_mask = gr_gv11b_load_tpc_mask;
 
 }