diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-06-21 19:34:10 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-05 06:06:57 -0400 |
commit | 37fa5128ec260bc9ebb2e902ac2dfe9baead4656 (patch) | |
tree | be8585bba05dd8e4277127fa5d091e1499710c32 /drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |
parent | f5b5099cf87a8d3219301c97189d581cafeaac4e (diff) |
gpu: nvgpu: gv11b: init get_sm_hww_warp_esr gr ops
get sm hww_warp_esr reg val
JIRA GPUT19X-75
Change-Id: I4ed04045e947c417291b7b1e2fc81bbe51f0b48c
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 8094ea43..2b083203 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -1928,16 +1928,6 @@ static int gr_gv11b_handle_fecs_error(struct gk20a *g, | |||
1928 | return ret; | 1928 | return ret; |
1929 | } | 1929 | } |
1930 | 1930 | ||
1931 | static u32 gv11b_mask_hww_warp_esr(u32 hww_warp_esr) | ||
1932 | { | ||
1933 | if (!(hww_warp_esr & gr_gpc0_tpc0_sm0_hww_warp_esr_wrap_id_m())) | ||
1934 | hww_warp_esr = set_field(hww_warp_esr, | ||
1935 | gr_gpc0_tpc0_sm0_hww_warp_esr_addr_error_type_m(), | ||
1936 | gr_gpc0_tpc0_sm0_hww_warp_esr_addr_error_type_none_f()); | ||
1937 | |||
1938 | return hww_warp_esr; | ||
1939 | } | ||
1940 | |||
1941 | static int gr_gv11b_setup_rop_mapping(struct gk20a *g, struct gr_gk20a *gr) | 1931 | static int gr_gv11b_setup_rop_mapping(struct gk20a *g, struct gr_gk20a *gr) |
1942 | { | 1932 | { |
1943 | u32 map; | 1933 | u32 map; |
@@ -2993,6 +2983,18 @@ static int gv11b_gr_resume_from_pause(struct gk20a *g) | |||
2993 | return err; | 2983 | return err; |
2994 | } | 2984 | } |
2995 | 2985 | ||
2986 | static u32 gv11b_gr_get_sm_hww_warp_esr(struct gk20a *g, | ||
2987 | u32 gpc, u32 tpc, u32 sm) | ||
2988 | { | ||
2989 | u32 offset = gk20a_gr_gpc_offset(g, gpc) + | ||
2990 | gk20a_gr_tpc_offset(g, tpc) + | ||
2991 | gv11b_gr_sm_offset(g, sm); | ||
2992 | |||
2993 | u32 hww_warp_esr = gk20a_readl(g, | ||
2994 | gr_gpc0_tpc0_sm0_hww_warp_esr_r() + offset); | ||
2995 | return hww_warp_esr; | ||
2996 | } | ||
2997 | |||
2996 | void gv11b_init_gr(struct gpu_ops *gops) | 2998 | void gv11b_init_gr(struct gpu_ops *gops) |
2997 | { | 2999 | { |
2998 | gp10b_init_gr(gops); | 3000 | gp10b_init_gr(gops); |
@@ -3030,7 +3032,6 @@ void gv11b_init_gr(struct gpu_ops *gops) | |||
3030 | gops->gr.enable_gpc_exceptions = gr_gv11b_enable_gpc_exceptions; | 3032 | gops->gr.enable_gpc_exceptions = gr_gv11b_enable_gpc_exceptions; |
3031 | gops->gr.enable_exceptions = gr_gv11b_enable_exceptions; | 3033 | gops->gr.enable_exceptions = gr_gv11b_enable_exceptions; |
3032 | gops->gr.enable_hww_exceptions = gr_gv11b_enable_hww_exceptions; | 3034 | gops->gr.enable_hww_exceptions = gr_gv11b_enable_hww_exceptions; |
3033 | gops->gr.mask_hww_warp_esr = gv11b_mask_hww_warp_esr; | ||
3034 | gops->gr.pre_process_sm_exception = | 3035 | gops->gr.pre_process_sm_exception = |
3035 | gr_gv11b_pre_process_sm_exception; | 3036 | gr_gv11b_pre_process_sm_exception; |
3036 | gops->gr.handle_fecs_error = gr_gv11b_handle_fecs_error; | 3037 | gops->gr.handle_fecs_error = gr_gv11b_handle_fecs_error; |
@@ -3067,4 +3068,5 @@ void gv11b_init_gr(struct gpu_ops *gops) | |||
3067 | gops->gr.resume_single_sm = gv11b_gr_resume_single_sm; | 3068 | gops->gr.resume_single_sm = gv11b_gr_resume_single_sm; |
3068 | gops->gr.resume_all_sms = gv11b_gr_resume_all_sms; | 3069 | gops->gr.resume_all_sms = gv11b_gr_resume_all_sms; |
3069 | gops->gr.resume_from_pause = gv11b_gr_resume_from_pause; | 3070 | gops->gr.resume_from_pause = gv11b_gr_resume_from_pause; |
3071 | gops->gr.get_sm_hww_warp_esr = gv11b_gr_get_sm_hww_warp_esr; | ||
3070 | } | 3072 | } |