gpu: nvgpu: send only one event to the debugger

Event notifications on TSGs should only be sent to the channel that caused the
event to happen in the first place, not evey channel in the tsg.  Any more and
the debugger will not be able to tell what channel actually got the event.
Worse yet, if all the channels in a tsg are bound to the same debug session
(as is the case with cuda-gdb), then multiple nvgpu events for the same gpu
event will be triggered, causing events to be buffered and the client to get
out of sync.

One gpu exception, one nvgpu event per tsg.

Bug 1793988

Change-Id: Ifb33b65f09f67b0e323917c7e7ea016fc3676f18
Signed-off-by: Cory Perry <cperry@nvidia.com>
Reviewed-on: http://git-master/r/1194207
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 12b07d11..9d0b4ade 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -1680,21 +1680,14 @@ static int gr_gv11b_handle_fecs_error(struct gk20a *g,
                 }
 
                 if (gk20a_gr_sm_debugger_attached(g)) {
+                        gk20a_dbg_gpu_post_events(ch);
+
                         if (gk20a_is_channel_marked_as_tsg(ch)) {
                                 struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
-                                struct channel_gk20a *__ch;
-
-                                mutex_lock(&tsg->ch_list_lock);
-                                list_for_each_entry(__ch, &tsg->ch_list, ch_entry) {
-                                        gk20a_dbg_gpu_post_events(__ch);
-                                }
-                                mutex_unlock(&tsg->ch_list_lock);
 
                                 gk20a_tsg_event_id_post_event(tsg,
                                         NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE);
                         } else {
-                                gk20a_dbg_gpu_post_events(ch);
-
                                 gk20a_channel_event_id_post_event(ch,
                                         NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE);
                         }