gpu: nvgpu: gv11b: Corrected sm whitelist address

corrected whitelist address for gr_pri_gpcs_tpcs_sms_dbgr_control0

JIRA GPUT19X-49
Bug 200311674

Change-Id: I512197c4a6ef97a59bbb303e31ab91f7727bf8d5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1499394
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 612c6628..5258e4ce 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -1625,7 +1625,7 @@ static void gr_gv11b_get_access_map(struct gk20a *g,
                 0x419864, /* gr_pri_gpcs_tpcs_pe_l2_evict_policy */
                 0x419a04, /* gr_pri_gpcs_tpcs_tex_lod_dbg      */
                 0x419a08, /* gr_pri_gpcs_tpcs_tex_samp_dbg     */
-                0x419e10, /* gr_pri_gpcs_tpcs_sm_dbgr_control0 */
+                0x419e84, /* gr_pri_gpcs_tpcs_sms_dbgr_control0 */
                 0x419f78, /* gr_pri_gpcs_tpcs_sm_disp_ctrl     */
         };