diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2017-06-29 18:59:05 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-05 18:40:25 -0400 |
commit | 6d758eb81bcbff4e50df5c9fa67a369a4e1f2074 (patch) | |
tree | 8b6f62c1cb64f878c13746b8f14d42a2d45105e6 /drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |
parent | 37fa5128ec260bc9ebb2e902ac2dfe9baead4656 (diff) |
gpu: nvgpu: gv11b: support for full subcontext
Changes to enable 64 subcontexts: 1 SYNC + 63 ASYNC
Currently all subcontexts with in a tsg can have only
single address space.
Add support for NVGPU_TSG_IOCTL_BIND_CHANNEL_EX for
selecting subctx id by client.
Bug 1842197
Change-Id: Icf56a41303bd1ad7fc6f2a6fbc691bb7b4a01d22
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master/r/1511145
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/fifo_gv11b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index 03cca839..032342b2 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV11B Fifo | 2 | * GV11B Fifo |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -36,6 +36,8 @@ | |||
36 | #define GR_RUNQUE 0 /* pbdma 0 */ | 36 | #define GR_RUNQUE 0 /* pbdma 0 */ |
37 | #define ASYNC_CE_RUNQUE 2 /* pbdma 2 */ | 37 | #define ASYNC_CE_RUNQUE 2 /* pbdma 2 */ |
38 | 38 | ||
39 | #define CHANNEL_INFO_VEID0 0 | ||
40 | |||
39 | struct gpu_ops; | 41 | struct gpu_ops; |
40 | void gv11b_init_fifo(struct gpu_ops *gops); | 42 | void gv11b_init_fifo(struct gpu_ops *gops); |
41 | void gv11b_fifo_reset_pbdma_and_eng_faulted(struct gk20a *g, | 43 | void gv11b_fifo_reset_pbdma_and_eng_faulted(struct gk20a *g, |