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authorSeema Khowala <seemaj@nvidia.com>2017-04-07 15:39:10 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-12 18:33:50 -0400
commit60d0ba2d37b4f2b67ecf0be4d6566af5a289ccb9 (patch)
tree0b7562a9e011e0cb838e0a5d79944d2619837b18 /drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
parent457f176785af5c8821889d00d89db05bbaf8f772 (diff)
gpu: nvgpu: gv11b: fix *get_runlists_mask*
if ch/tsg id is unknown and bit mask for the engines that need to be recovered is not set, runlist mask should correspond to max number of supported runlists JIRA GPUT19X-7 Change-Id: I08e67af0846784a7918510d68de34e9162a42bf6 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1458155 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/fifo_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/fifo_gv11b.c45
1 files changed, 26 insertions, 19 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
index 6883d867..d3411d32 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
@@ -543,35 +543,42 @@ u32 gv11b_fifo_get_runlists_mask(struct gk20a *g, u32 act_eng_bitmask,
543 543
544 if (id_type != ID_TYPE_UNKNOWN) { 544 if (id_type != ID_TYPE_UNKNOWN) {
545 if (id_type == ID_TYPE_TSG) 545 if (id_type == ID_TYPE_TSG)
546 runlists_mask = fifo_sched_disable_runlist_m( 546 runlists_mask |= fifo_sched_disable_runlist_m(
547 f->tsg[id].runlist_id); 547 f->tsg[id].runlist_id);
548 else 548 else
549 runlists_mask = fifo_sched_disable_runlist_m( 549 runlists_mask |= fifo_sched_disable_runlist_m(
550 f->channel[id].runlist_id); 550 f->channel[id].runlist_id);
551 } else { 551 }
552 if (rc_type == RC_TYPE_MMU_FAULT && mmfault) {
553 if (mmfault->faulted_pbdma != FIFO_INVAL_PBDMA_ID)
554 pbdma_bitmask = BIT(mmfault->faulted_pbdma);
555 552
556 for (id = 0; id < f->max_runlists; id++) { 553 if (rc_type == RC_TYPE_MMU_FAULT && mmfault) {
554 if (mmfault->faulted_pbdma != FIFO_INVAL_PBDMA_ID)
555 pbdma_bitmask = BIT(mmfault->faulted_pbdma);
557 556
558 runlist = &f->runlist_info[id]; 557 for (id = 0; id < f->max_runlists; id++) {
559 558
560 if (runlist->eng_bitmask & act_eng_bitmask) 559 runlist = &f->runlist_info[id];
561 runlists_mask |=
562 fifo_sched_disable_runlist_m(id);
563 560
564 if (runlist->pbdma_bitmask & pbdma_bitmask) 561 if (runlist->eng_bitmask & act_eng_bitmask)
565 runlists_mask |= 562 runlists_mask |=
566 fifo_sched_disable_runlist_m(id); 563 fifo_sched_disable_runlist_m(id);
567 } 564
568 } else { 565 if (runlist->pbdma_bitmask & pbdma_bitmask)
569 /* ID is unknown */ 566 runlists_mask |=
570 for (id = 0; id < f->max_runlists; id++) { 567 fifo_sched_disable_runlist_m(id);
568 }
569 }
570
571 if (id_type == ID_TYPE_UNKNOWN) {
572 for (id = 0; id < f->max_runlists; id++) {
573 if (act_eng_bitmask) {
574 /* eng ids are known */
571 runlist = &f->runlist_info[id]; 575 runlist = &f->runlist_info[id];
572 if (runlist->eng_bitmask & act_eng_bitmask) 576 if (runlist->eng_bitmask & act_eng_bitmask)
573 runlists_mask |= 577 runlists_mask |=
574 fifo_sched_disable_runlist_m(id); 578 fifo_sched_disable_runlist_m(id);
579 } else {
580 runlists_mask |=
581 fifo_sched_disable_runlist_m(id);
575 } 582 }
576 } 583 }
577 } 584 }