gpu: nvgpu: gv11b: do not poll if stall intr is set

Do not continue polling if engine save has not started yet
and stall intr is set because if a stall intr is hit,
preemption will anyways not get completed. Just set the
reset_eng_bitmask of the engine for which ctx_status
was being polled, As part of teardown corresponding
engine will be reset.

Bug 2069807

Change-Id: I9a506e0bca1d891ed5cd5d4953e292a40356f8ff
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1683694
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
index 4050579e..039ca941 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
@@ -493,6 +493,12 @@ static int gv11b_fifo_poll_eng_ctx_status(struct gk20a *g, u32 id,
                 if (ctx_stat ==
                          fifo_engine_status_ctx_status_ctxsw_switch_v()) {
                         /* Eng save hasn't started yet. Continue polling */
+                        if (stall_intr) {
+                                /* if stall intr stop polling */
+                                *reset_eng_bitmask |= BIT(act_eng_id);
+                                ret = 0;
+                                break;
+                        }
 
                 } else if (ctx_stat ==
                          fifo_engine_status_ctx_status_valid_v() ||