gpu: nvgpu: init intr_0_error_mask fifo ops

mmu fault is now part of hub interrupt

Change-Id: I9ce523d5f11955ac9552510d154eaa2f17a6cbf6
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1313484
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 13 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
index e33b8ee2..eb8f44d7 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
@@ -311,6 +311,18 @@ static void gv11b_dump_eng_status(struct gk20a *g,
         gk20a_debug_output(o, "\n");
 }
 
+static u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g)
+{
+        u32 intr_0_error_mask =
+                fifo_intr_0_bind_error_pending_f() |
+                fifo_intr_0_sched_error_pending_f() |
+                fifo_intr_0_chsw_error_pending_f() |
+                fifo_intr_0_fb_flush_timeout_pending_f() |
+                fifo_intr_0_lb_error_pending_f();
+
+        return intr_0_error_mask;
+}
+
 void gv11b_init_fifo(struct gpu_ops *gops)
 {
         gp10b_init_fifo(gops);
@@ -333,4 +345,5 @@ void gv11b_init_fifo(struct gpu_ops *gops)
         gops->fifo.dump_pbdma_status = gk20a_dump_pbdma_status;
         gops->fifo.dump_eng_status = gv11b_dump_eng_status;
         gops->fifo.dump_channel_status_ramfc = gv11b_dump_channel_status_ramfc;
+        gops->fifo.intr_0_error_mask = gv11b_fifo_intr_0_error_mask;
 }