gpu: nvgpu: GPC MMU ECC support

Adding support for GPC MMU ECC error handling

JIRA: GPUT19X-112

Change-Id: I62083bf2f144ff628ecd8c0aefc8d227a233ff36
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1490772
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h
index 4e1696f7..70b1bab8 100644
--- a/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h
@@ -31,6 +31,8 @@ struct ecc_gr_t19x {
         struct gk20a_ecc_stat fecs_uncorrected_err_count;
         struct gk20a_ecc_stat gpccs_corrected_err_count;
         struct gk20a_ecc_stat gpccs_uncorrected_err_count;
+        struct gk20a_ecc_stat mmu_l1tlb_corrected_err_count;
+        struct gk20a_ecc_stat mmu_l1tlb_uncorrected_err_count;
 };
 
 struct ecc_ltc_t19x {