gpu: nvgpu: Add MC APIs for reset masks

Add API for querying reset mask corresponding to a unit. The reset
masks need to be read from MC HW header, and we do not want all
units to access Mc HW headers themselves.

JIRA NVGPU-954

Change-Id: I49ebbd891569de634bfc71afcecc8cd2358805c0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1823384
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c b/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c
index ec6cce55..2b2410eb 100644
--- a/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c
@@ -26,10 +26,10 @@
 #include <nvgpu/io.h>
 #include <nvgpu/utils.h>
 #include <nvgpu/gk20a.h>
+#include <nvgpu/unit.h>
 
 #include "gv11b/dbg_gpu_gv11b.h"
 #include <nvgpu/hw/gv11b/hw_perf_gv11b.h>
-#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
 #include <nvgpu/bug.h>
 
 static void gv11b_perfbuf_reset_streaming(struct gk20a *g)
@@ -37,7 +37,7 @@ static void gv11b_perfbuf_reset_streaming(struct gk20a *g)
         u32 engine_status;
         u32 num_unread_bytes;
 
-        g->ops.mc.reset(g, mc_enable_perfmon_enabled_f());
+        g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON));
 
         engine_status = gk20a_readl(g, perf_pmasys_enginestatus_r());
         WARN_ON(0u ==