gpu: nvgpu: Enable IO coherency on GV100

This reverts commit 848af2ce6de6140323a6ffe3075bf8021e119434.

This is a revert of a revert, etc, etc. It re-enables IO coherence again.

JIRA EVLR-2333

Change-Id: Ibf97dce2f892e48a1200a06cd38a1c5d9603be04
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1669722
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c b/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c
index e5d88e8c..562476ca 100644
--- a/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c
@@ -59,11 +59,12 @@ int gv11b_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size)
         inst_pa_page = nvgpu_inst_block_addr(g, &mm->perfbuf.inst_block) >> 12;
 
         gk20a_writel(g, perf_pmasys_mem_block_r(),
-                        perf_pmasys_mem_block_base_f(inst_pa_page) |
-                        perf_pmasys_mem_block_valid_true_f() |
-                        nvgpu_aperture_mask(g, &mm->perfbuf.inst_block,
-+                               perf_pmasys_mem_block_target_sys_ncoh_f(),
-+                               perf_pmasys_mem_block_target_lfb_f()));
+                     perf_pmasys_mem_block_base_f(inst_pa_page) |
+                     perf_pmasys_mem_block_valid_true_f() |
+                     nvgpu_aperture_mask(g, &mm->perfbuf.inst_block,
+                                perf_pmasys_mem_block_target_sys_ncoh_f(),
+                                perf_pmasys_mem_block_target_sys_coh_f(),
+                                perf_pmasys_mem_block_target_lfb_f()));
 
         gk20a_idle(g);
         return 0;