summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c
diff options
context:
space:
mode:
authorTimo Alho <talho@nvidia.com>2018-03-05 02:31:06 -0500
committerTimo Alho <talho@nvidia.com>2018-03-05 11:39:57 -0500
commit848af2ce6de6140323a6ffe3075bf8021e119434 (patch)
treec89f28ac819f637b554f191da2f6a0fd8d75253e /drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c
parent89fbf39a05483917c0a9f3453fd94c724bc37375 (diff)
Revert "Revert "Revert "gpu: nvgpu: Get coherency on gv100 + NVLINK working"""
This reverts commit 89fbf39a05483917c0a9f3453fd94c724bc37375. Bug 2075315 Change-Id: Id34a0376be5160b164931926ec600f77edf69667 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1668487 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c
index 86977bb3..617ea61d 100644
--- a/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c
@@ -31,14 +31,14 @@
31#include <nvgpu/dma.h> 31#include <nvgpu/dma.h>
32#include <nvgpu/mm.h> 32#include <nvgpu/mm.h>
33#include <nvgpu/sizes.h> 33#include <nvgpu/sizes.h>
34#include <nvgpu/enabled.h>
35#include <nvgpu/log.h>
36#include <nvgpu/bug.h>
37 34
38#include "gk20a/gk20a.h" 35#include "gk20a/gk20a.h"
39#include "gk20a/css_gr_gk20a.h" 36#include "gk20a/css_gr_gk20a.h"
40#include "css_gr_gv11b.h" 37#include "css_gr_gv11b.h"
41 38
39#include <nvgpu/log.h>
40#include <nvgpu/bug.h>
41
42#include <nvgpu/hw/gv11b/hw_perf_gv11b.h> 42#include <nvgpu/hw/gv11b/hw_perf_gv11b.h>
43#include <nvgpu/hw/gv11b/hw_mc_gv11b.h> 43#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
44 44
@@ -144,7 +144,6 @@ int gv11b_css_hw_enable_snapshot(struct channel_gk20a *ch,
144 perf_pmasys_mem_block_valid_true_f() | 144 perf_pmasys_mem_block_valid_true_f() |
145 nvgpu_aperture_mask(g, &g->mm.hwpm.inst_block, 145 nvgpu_aperture_mask(g, &g->mm.hwpm.inst_block,
146 perf_pmasys_mem_block_target_sys_ncoh_f(), 146 perf_pmasys_mem_block_target_sys_ncoh_f(),
147 perf_pmasys_mem_block_target_sys_coh_f(),
148 perf_pmasys_mem_block_target_lfb_f())); 147 perf_pmasys_mem_block_target_lfb_f()));
149 148
150 149