gpu: nvgpu: gv11b: init get_num_pce ce ops

Implement get_num_pce ce ops to get number of physical
copy engines. This is required to calculate eng method
buffer size

JIRA GPUT19X-46

Change-Id: I5a37eb26ec11bc358700d1761cfdb6ca060e4287
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1511788
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 15 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/ce_gv11b.c b/drivers/gpu/nvgpu/gv11b/ce_gv11b.c
index 1ba009bd..0bbd05b6 100644
--- a/drivers/gpu/nvgpu/gv11b/ce_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/ce_gv11b.c
@@ -17,6 +17,7 @@
  */
 
 #include "nvgpu/log.h"
+#include "nvgpu/bitops.h"
 
 #include "gk20a/gk20a.h"
 
@@ -26,6 +27,19 @@
 
 #include <nvgpu/hw/gv11b/hw_ce_gv11b.h>
 
+static u32 gv11b_ce_get_num_pce(struct gk20a *g)
+{
+        /* register contains a bitmask indicating which physical copy
+         * engines are present (and not floorswept).
+         */
+        u32 num_pce;
+        u32 ce_pce_map = gk20a_readl(g, ce_pce_map_r());
+
+        num_pce = get_count_order(ce_pce_map) + 1;
+        nvgpu_log_info(g, "num PCE: %d", num_pce);
+        return num_pce;
+}
+
 static void gv11b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base)
 {
         u32 ce_intr = gk20a_readl(g, ce_intr_status_r(inst_id));
@@ -64,4 +78,5 @@ void gv11b_init_ce(struct gpu_ops *gops)
 {
         gp10b_init_ce(gops);
         gops->ce2.isr_stall = gv11b_ce_isr;
+        gops->ce2.get_num_pce = gv11b_ce_get_num_pce;
 }