summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
diff options
context:
space:
mode:
authorDebarshi Dutta <ddutta@nvidia.com>2018-08-22 00:27:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-29 20:46:51 -0400
commit74639b444251d7adc222400625eb59a3d53d0c0a (patch)
tree19373fbe8ee522863c990fdfa0db24e6474f5167 /drivers/gpu/nvgpu/gv11b/acr_gv11b.c
parente3710e5431d8f14f1b8c2812f5c1aeeb7bdaac1c (diff)
gpu: nvgpu: invoke calls to methods in pmu_gk20a.h via HAL
In nvgpu repository, we have multiple accesses to methods in pmu_gk20a.h which have register accesses. Instead of directly invoking these methods, these are now called via HALs. Some common methods such as pmu_wait_message_cond which donot have any register accesses are moved to pmu_ipc.c and the method declarations are moved to pmu.h. Also, changed gm20b_pmu_dbg to nvgpu_dbg_pmu all across the code base. This would remove all indirect dependencies via gk20a.h into pmu_gk20a.h. As a result pmu_gk20a.h is now removed from gk20a.h JIRA-597 Change-Id: Id54b2684ca39362fda7626238c3116cd49e92080 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1804283 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/acr_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/acr_gv11b.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
index a6bbaa40..e27c1760 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
@@ -37,7 +37,6 @@
37#include "gk20a/gk20a.h" 37#include "gk20a/gk20a.h"
38#include "acr_gv11b.h" 38#include "acr_gv11b.h"
39#include "pmu_gv11b.h" 39#include "pmu_gv11b.h"
40#include "gk20a/pmu_gk20a.h"
41#include "gm20b/mm_gm20b.h" 40#include "gm20b/mm_gm20b.h"
42#include "gm20b/acr_gm20b.h" 41#include "gm20b/acr_gm20b.h"
43#include "gp106/acr_gp106.h" 42#include "gp106/acr_gp106.h"
@@ -287,7 +286,7 @@ int gv11b_init_pmu_setup_hw1(struct gk20a *g,
287 286
288 /*disable irqs for hs falcon booting as we will poll for halt*/ 287 /*disable irqs for hs falcon booting as we will poll for halt*/
289 nvgpu_mutex_acquire(&pmu->isr_mutex); 288 nvgpu_mutex_acquire(&pmu->isr_mutex);
290 pmu_enable_irq(pmu, false); 289 g->ops.pmu.pmu_enable_irq(pmu, false);
291 pmu->isr_enabled = false; 290 pmu->isr_enabled = false;
292 nvgpu_mutex_release(&pmu->isr_mutex); 291 nvgpu_mutex_release(&pmu->isr_mutex);
293 /*Clearing mailbox register used to reflect capabilities*/ 292 /*Clearing mailbox register used to reflect capabilities*/