diff options
author | Alex Waterman <alexw@nvidia.com> | 2018-02-28 12:19:19 -0500 |
---|---|---|
committer | Srikar Srimath Tirumala <srikars@nvidia.com> | 2018-02-28 16:49:22 -0500 |
commit | 5a35a95654d561fce09a3b9abf6b82bb7a29d74b (patch) | |
tree | 119a07134188d8e06c29a570dd8c6b143f39c9e1 /drivers/gpu/nvgpu/gv11b/acr_gv11b.c | |
parent | 3fdd8e38b280123fd13bcc4f3fd8928c15e94db6 (diff) |
Revert "gpu: nvgpu: Get coherency on gv100 + NVLINK working"
Also revert other changes related to IO coherence. This may be the
culprit in a recent dev-kernel lockdown.
Bug 2070609
Change-Id: Ida178aef161fadbc6db9512521ea51c702c1564b
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1665914
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/acr_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/acr_gv11b.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c index 4fa3f324..799b2db4 100644 --- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c | |||
@@ -27,10 +27,9 @@ | |||
27 | #include <nvgpu/nvgpu_common.h> | 27 | #include <nvgpu/nvgpu_common.h> |
28 | #include <nvgpu/kmem.h> | 28 | #include <nvgpu/kmem.h> |
29 | #include <nvgpu/nvgpu_mem.h> | 29 | #include <nvgpu/nvgpu_mem.h> |
30 | #include <nvgpu/acr/nvgpu_acr.h> | ||
30 | #include <nvgpu/firmware.h> | 31 | #include <nvgpu/firmware.h> |
31 | #include <nvgpu/mm.h> | 32 | #include <nvgpu/mm.h> |
32 | #include <nvgpu/enabled.h> | ||
33 | #include <nvgpu/acr/nvgpu_acr.h> | ||
34 | 33 | ||
35 | #include "gk20a/gk20a.h" | 34 | #include "gk20a/gk20a.h" |
36 | #include "acr_gv11b.h" | 35 | #include "acr_gv11b.h" |
@@ -221,9 +220,7 @@ static int bl_bootstrap(struct nvgpu_pmu *pmu, | |||
221 | pwr_pmu_new_instblk_ptr_f( | 220 | pwr_pmu_new_instblk_ptr_f( |
222 | nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | | 221 | nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | |
223 | pwr_pmu_new_instblk_valid_f(1) | | 222 | pwr_pmu_new_instblk_valid_f(1) | |
224 | (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM) ? | 223 | pwr_pmu_new_instblk_target_sys_ncoh_f()); |
225 | pwr_pmu_new_instblk_target_sys_coh_f() : | ||
226 | pwr_pmu_new_instblk_target_sys_ncoh_f())) ; | ||
227 | 224 | ||
228 | /*copy bootloader interface structure to dmem*/ | 225 | /*copy bootloader interface structure to dmem*/ |
229 | nvgpu_flcn_copy_to_dmem(pmu->flcn, 0, (u8 *)pbl_desc, | 226 | nvgpu_flcn_copy_to_dmem(pmu->flcn, 0, (u8 *)pbl_desc, |