gpu: nvgpu: enable HWPM Mode-E context switch

- Write new pm mode to context buffer header. Ucode use
this mode to enable mode-e context switch. This is Mode-B
context switch of PMs with Mode-E streamout on one context.
If this mode is set, Ucode makes sure that Mode-E pipe
(perfmons, routers, pma) is idle before it context switches PMs.
- This allows us to collect counters in a secure way
(i.e. on context basis) with stream out.

Bug 2106999

Change-Id: I5a7435f09d1bf053ca428e538b0a57f3a175ac37
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1760366
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 9 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.c b/drivers/gpu/nvgpu/gv100/gr_gv100.c
index 680bcba3..b1b1cee6 100644
--- a/drivers/gpu/nvgpu/gv100/gr_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/gr_gv100.c
@@ -38,6 +38,7 @@
 #include <nvgpu/hw/gv100/hw_proj_gv100.h>
 #include <nvgpu/hw/gv100/hw_fuse_gv100.h>
 #include <nvgpu/hw/gv100/hw_top_gv100.h>
+#include <nvgpu/hw/gv100/hw_ctxsw_prog_gv100.h>
 
 
 /*
@@ -453,3 +454,8 @@ void gr_gv100_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr,
                 }
         }
 }
+
+u32 gr_gv100_get_hw_accessor_stream_out_mode()
+{
+        return ctxsw_prog_main_image_pm_mode_stream_out_ctxsw_f();
+}
diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.h b/drivers/gpu/nvgpu/gv100/gr_gv100.h
index 821659aa..457bd701 100644
--- a/drivers/gpu/nvgpu/gv100/gr_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/gr_gv100.h
@@ -47,4 +47,5 @@ void gr_gv100_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr,
         u32 num_fbpas,
         u32 *priv_addr_table, u32 *t);
 void gr_gv100_init_gpc_mmu(struct gk20a *g);
+u32 gr_gv100_get_hw_accessor_stream_out_mode(void);
 #endif
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index 07c71a04..c84778dd 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -358,6 +358,8 @@ static const struct gpu_ops gv100_ops = {
                 .enable_exceptions = gr_gv11b_enable_exceptions,
                 .get_lrf_tex_ltc_dram_override = get_ecc_override_val,
                 .update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode,
+                .get_hw_accessor_stream_out_mode =
+                        gr_gv100_get_hw_accessor_stream_out_mode,
                 .update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode,
                 .record_sm_error_state = gv11b_gr_record_sm_error_state,
                 .update_sm_error_state = gv11b_gr_update_sm_error_state,