diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-05-25 17:25:01 -0400 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:07 -0400 |
commit | dec8625b88d1430f4bf3eac37954fbb732de3f1a (patch) | |
tree | a90171ea9fbd53c8690f8338af54befad3d624ef /drivers/gpu/nvgpu/gv100 | |
parent | d4dfa63e6c324430ad2cac4fabb73a95858b2573 (diff) |
gpu: nvgpu: Move SW scratch register read to bus
SW scratch register is in bus register range. Move query of that
register to bus HAL from bios.
JIRA NVGPU-588
Change-Id: I69f35af3d5f8da3550eb68fe7d060a3ec48ce275
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730898
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/bios_gv100.c | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 3 |
2 files changed, 11 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gv100/bios_gv100.c b/drivers/gpu/nvgpu/gv100/bios_gv100.c index 9ca05a11..45d5ed31 100644 --- a/drivers/gpu/nvgpu/gv100/bios_gv100.c +++ b/drivers/gpu/nvgpu/gv100/bios_gv100.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include "bios_gv100.h" | 29 | #include "bios_gv100.h" |
30 | 30 | ||
31 | #include <nvgpu/hw/gv100/hw_pwr_gv100.h> | 31 | #include <nvgpu/hw/gv100/hw_pwr_gv100.h> |
32 | #include <nvgpu/hw/gv100/hw_bus_gv100.h> | ||
33 | 32 | ||
34 | #define PMU_BOOT_TIMEOUT_DEFAULT 100 /* usec */ | 33 | #define PMU_BOOT_TIMEOUT_DEFAULT 100 /* usec */ |
35 | #define PMU_BOOT_TIMEOUT_MAX 2000000 /* usec */ | 34 | #define PMU_BOOT_TIMEOUT_MAX 2000000 /* usec */ |
@@ -53,14 +52,13 @@ | |||
53 | 52 | ||
54 | void gv100_bios_preos_reload_check(struct gk20a *g) | 53 | void gv100_bios_preos_reload_check(struct gk20a *g) |
55 | { | 54 | { |
56 | u32 progress = gk20a_readl(g, | 55 | u32 progress = g->ops.bus.read_sw_scratch(g, SCRATCH_PREOS_PROGRESS); |
57 | bus_sw_scratch_r(SCRATCH_PREOS_PROGRESS)); | ||
58 | 56 | ||
59 | if (PREOS_PROGRESS_MASK(progress) != PREOS_PROGRESS_NOT_STARTED) { | 57 | if (PREOS_PROGRESS_MASK(progress) != PREOS_PROGRESS_NOT_STARTED) { |
60 | u32 reload = gk20a_readl(g, | 58 | u32 reload = g->ops.bus.read_sw_scratch(g, |
61 | bus_sw_scratch_r(SCRATCH_PRE_OS_RELOAD)); | 59 | SCRATCH_PRE_OS_RELOAD); |
62 | 60 | ||
63 | gk20a_writel(g, bus_sw_scratch_r(SCRATCH_PRE_OS_RELOAD), | 61 | g->ops.bus.write_sw_scratch(g, SCRATCH_PRE_OS_RELOAD, |
64 | PRE_OS_RELOAD_SET(reload, PRE_OS_RELOAD_YES)); | 62 | PRE_OS_RELOAD_SET(reload, PRE_OS_RELOAD_YES)); |
65 | } | 63 | } |
66 | } | 64 | } |
@@ -76,16 +74,15 @@ int gv100_bios_preos_wait_for_halt(struct gk20a *g) | |||
76 | nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT); | 74 | nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT); |
77 | 75 | ||
78 | /* Check the progress */ | 76 | /* Check the progress */ |
79 | progress = gk20a_readl(g, bus_sw_scratch_r(SCRATCH_PREOS_PROGRESS)); | 77 | progress = g->ops.bus.read_sw_scratch(g, SCRATCH_PREOS_PROGRESS); |
80 | 78 | ||
81 | if (PREOS_PROGRESS_MASK(progress) == PREOS_PROGRESS_STARTED) { | 79 | if (PREOS_PROGRESS_MASK(progress) == PREOS_PROGRESS_STARTED) { |
82 | err = 0; | 80 | err = 0; |
83 | 81 | ||
84 | /* Complete the handshake */ | 82 | /* Complete the handshake */ |
85 | tmp = gk20a_readl(g, | 83 | tmp = g->ops.bus.read_sw_scratch(g, SCRATCH_PMU_EXIT_AND_HALT); |
86 | bus_sw_scratch_r(SCRATCH_PMU_EXIT_AND_HALT)); | ||
87 | 84 | ||
88 | gk20a_writel(g, bus_sw_scratch_r(SCRATCH_PMU_EXIT_AND_HALT), | 85 | g->ops.bus.write_sw_scratch(g, SCRATCH_PMU_EXIT_AND_HALT, |
89 | PMU_EXIT_AND_HALT_SET(tmp, PMU_EXIT_AND_HALT_YES)); | 86 | PMU_EXIT_AND_HALT_SET(tmp, PMU_EXIT_AND_HALT_YES)); |
90 | 87 | ||
91 | nvgpu_timeout_init(g, &timeout, | 88 | nvgpu_timeout_init(g, &timeout, |
@@ -94,8 +91,7 @@ int gv100_bios_preos_wait_for_halt(struct gk20a *g) | |||
94 | NVGPU_TIMER_RETRY_TIMER); | 91 | NVGPU_TIMER_RETRY_TIMER); |
95 | 92 | ||
96 | do { | 93 | do { |
97 | progress = gk20a_readl(g, | 94 | progress = g->ops.bus.read_sw_scratch(g, SCRATCH_PREOS_PROGRESS); |
98 | bus_sw_scratch_r(SCRATCH_PREOS_PROGRESS)); | ||
99 | preos_completed = pwr_falcon_cpuctl_halt_intr_v( | 95 | preos_completed = pwr_falcon_cpuctl_halt_intr_v( |
100 | gk20a_readl(g, pwr_falcon_cpuctl_r())) && | 96 | gk20a_readl(g, pwr_falcon_cpuctl_r())) && |
101 | (PREOS_PROGRESS_MASK(progress) == | 97 | (PREOS_PROGRESS_MASK(progress) == |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 13e0c1a3..56429975 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -24,6 +24,7 @@ | |||
24 | 24 | ||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/bus/bus_gp10b.h" | 26 | #include "common/bus/bus_gp10b.h" |
27 | #include "common/bus/bus_gv100.h" | ||
27 | #include "common/clock_gating/gv100_gating_reglist.h" | 28 | #include "common/clock_gating/gv100_gating_reglist.h" |
28 | #include "common/ptimer/ptimer_gk20a.h" | 29 | #include "common/ptimer/ptimer_gk20a.h" |
29 | 30 | ||
@@ -794,6 +795,8 @@ static const struct gpu_ops gv100_ops = { | |||
794 | .bar1_bind = NULL, | 795 | .bar1_bind = NULL, |
795 | .bar2_bind = gp10b_bus_bar2_bind, | 796 | .bar2_bind = gp10b_bus_bar2_bind, |
796 | .set_bar0_window = gk20a_bus_set_bar0_window, | 797 | .set_bar0_window = gk20a_bus_set_bar0_window, |
798 | .read_sw_scratch = gv100_bus_read_sw_scratch, | ||
799 | .write_sw_scratch = gv100_bus_write_sw_scratch, | ||
797 | }, | 800 | }, |
798 | .ptimer = { | 801 | .ptimer = { |
799 | .isr = gk20a_ptimer_isr, | 802 | .isr = gk20a_ptimer_isr, |