gpu: nvgpu: gv11b: do not poll preempt done if eng intr pending

-During polling eng preempt done, reset eng only if eng stall
 intr is pending. Also stop polling for eng preempt done
 if eng intr is pending.
-Add max retries for pre-si platforms for poll pbdma and eng
 preempt done polling loops.

Bug 2125776
Bug 2108544
Bug 2105322
Bug 2092051
Bug 2048824
Bug 2043838
Bug 2039587
Bug 2028993
Bug 2029245
Bug 2065990
Bug 1945121
Bug 200401707
Bug 200393631
Bug 200327596

Change-Id: I66b07be9647f141bd03801f83e3cda797e88272f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1694137
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 10 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.c b/drivers/gpu/nvgpu/gv100/mc_gv100.c
index 7ed9e6da..2d84a3a8 100644
--- a/drivers/gpu/nvgpu/gv100/mc_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/mc_gv100.c
@@ -72,15 +72,14 @@ bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0)
         return (((mc_intr_0 & mc_intr_nvlink_pending_f()) != 0U) ? true : false);
 }
 
-bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id)
+bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id,
+                        u32 *eng_intr_pending)
 {
         u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0));
         u32 stall_intr, eng_intr_mask;
 
         eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id);
-        if ((mc_intr_0 & eng_intr_mask) != 0U) {
-                return true;
-        }
+        *eng_intr_pending = mc_intr_0 & eng_intr_mask;
 
         stall_intr = mc_intr_pfifo_pending_f() |
                         mc_intr_hub_pending_f() |
@@ -88,9 +87,10 @@ bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id)
                         mc_intr_pbus_pending_f() |
                         mc_intr_ltc_pending_f() |
                         mc_intr_nvlink_pending_f();
-        if ((mc_intr_0 & stall_intr) != 0U) {
-                return true;
-        }
 
-        return false;
+        nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr,
+                "mc_intr_0 = 0x%08x, eng_intr = 0x%08x",
+                mc_intr_0 & stall_intr, *eng_intr_pending);
+
+        return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U;
 }
diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.h b/drivers/gpu/nvgpu/gv100/mc_gv100.h
index 4aff4a36..e9069258 100644
--- a/drivers/gpu/nvgpu/gv100/mc_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/mc_gv100.h
@@ -26,5 +26,6 @@ struct gk20a;
 
 void mc_gv100_intr_enable(struct gk20a *g);
 bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0);
-bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id);
+bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id,
+                        u32 *eng_intr_pending);
 #endif