Revert: GV11B runlist preemption patches

This reverts commit 2d397e34a5aafb5feed406a13f3db536eadae5bb.
This reverts commit cd6e821cf66837a2c3479e928414007064b9c496.
This reverts commit 5cf1eb145fef763f7153e449be60f1a7602e2c81.
This reverts commit a8d6f31bde3ccef22ee77023eaff4a62f6f88199.
This reverts commit 067ddbc4e4df3f1f756f03e7865c369a46f420aa.
This reverts commit 3eede64de058fcb1e39d723dd146bcd5d06c6f43.
This reverts commit 1407133b7e1b27a92ee8c116009541904d2ff691.
This reverts commit 797dde3e32647df3b616cea67f4defae59d38b3f.

Looks like this makes the ap_compute test on embedded-qnx-hv
e3550-t194 quite bad. Might also affect ap_resmgr.

Signed-off-by: Alex Waterman <alexw@nvidia.com>
Change-Id: Ib9f06514d554d1a67993f0f2bd3d180147385e0a
Reviewed-on: https://git-master.nvidia.com/r/1761864
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit

2 files changed, 9 insertions, 10 deletions

diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.c b/drivers/gpu/nvgpu/gv100/mc_gv100.c
index 2d84a3a8..7ed9e6da 100644
--- a/drivers/gpu/nvgpu/gv100/mc_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/mc_gv100.c
@@ -72,14 +72,15 @@ bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0)
         return (((mc_intr_0 & mc_intr_nvlink_pending_f()) != 0U) ? true : false);
 }
 
-bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id,
-                        u32 *eng_intr_pending)
+bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id)
 {
         u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0));
         u32 stall_intr, eng_intr_mask;
 
         eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id);
-        *eng_intr_pending = mc_intr_0 & eng_intr_mask;
+        if ((mc_intr_0 & eng_intr_mask) != 0U) {
+                return true;
+        }
 
         stall_intr = mc_intr_pfifo_pending_f() |
                         mc_intr_hub_pending_f() |
@@ -87,10 +88,9 @@ bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id,
                         mc_intr_pbus_pending_f() |
                         mc_intr_ltc_pending_f() |
                         mc_intr_nvlink_pending_f();
+        if ((mc_intr_0 & stall_intr) != 0U) {
+                return true;
+        }
 
-        nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr,
-                "mc_intr_0 = 0x%08x, eng_intr = 0x%08x",
-                mc_intr_0 & stall_intr, *eng_intr_pending);
-
-        return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U;
+        return false;
 }
diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.h b/drivers/gpu/nvgpu/gv100/mc_gv100.h
index e9069258..4aff4a36 100644
--- a/drivers/gpu/nvgpu/gv100/mc_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/mc_gv100.h
@@ -26,6 +26,5 @@ struct gk20a;
 
 void mc_gv100_intr_enable(struct gk20a *g);
 bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0);
-bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id,
-                        u32 *eng_intr_pending);
+bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id);
 #endif