gpu: nvgpu: nvlink: Add HAL for RXDET

RXDET is supported only on nvlink 2.2 devices and forward.
Add HAL to run RXDET selectively based on chip. RXDET needs to be
done after the links are out of reset but before any other link
level initialization.
minion_send_cmd is also made non-static to support RXDET
functionality.

JIRA NVLINK-160

Change-Id: Ic65b8dbc7281743f62072089ff3c805521ac9b38
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1729525
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 12 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
index 7258b9e9..098aae0e 100644
--- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
@@ -735,10 +735,10 @@ static u32 gv100_nvlink_minion_command_complete(struct gk20a *g, u32 link_id)
 /*
  * Send Minion command (can be async)
  */
-static u32 gv100_nvlink_minion_send_command(struct gk20a *g,
-        u32 link_id, u32 command, u32 scratch_0, bool sync)
+int gv100_nvlink_minion_send_command(struct gk20a *g, u32 link_id,
+                                u32 command, u32 scratch_0, bool sync)
 {
-        u32 err = 0;
+        int err = 0;
 
         /* Check last command succeded */
         err = gv100_nvlink_minion_command_complete(g, link_id);
@@ -1579,6 +1579,15 @@ static int gv100_nvlink_enable_links_pre_top(struct gk20a *g, u32 links)
                 IOCTRL_REG_WR32(g, ioctrl_debug_reset_r(), reg);
                 nvgpu_udelay(delay);
 
+                /* Before  doing any link initialization, run RXDET to check
+                 * if link is connected on  other end.
+                 */
+                if (g->ops.nvlink.rxdet) {
+                        err = g->ops.nvlink.rxdet(g, link_id);
+                        if (err)
+                                return err;
+                }
+
                 /* Enable Link DLPL for AN0 */
                 reg = DLPL_REG_RD32(g, link_id, nvl_link_config_r());
                 reg = set_field(reg, nvl_link_config_link_en_m(),