gpu: nvgpu: HAL-ify pmm type broadcast values

The PMM type-specific broadcast->unicast expansion calculation
was using incorrect values.  This caused the invalid register
accesses to be generated.

This change HAL-ifies the values, so that the expansion will be
performed correctly.

Bug 200454109

Change-Id: I96c15de27b5e16e4db2e788fd98e6bf7d6e7d564
Signed-off-by: Matthew Braun <matthewb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1921717
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 21 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index be5341b1..5f1a18a0 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -243,6 +243,27 @@ static u32 gv100_get_litter_value(struct gk20a *g, int value)
         case GPU_LIT_GPC_PRIV_STRIDE:
                 ret = proj_gpc_priv_stride_v();
                 break;
+        case GPU_LIT_PERFMON_PMMGPCTPCA_DOMAIN_START:
+                ret = 2;
+                break;
+        case GPU_LIT_PERFMON_PMMGPCTPCB_DOMAIN_START:
+                ret = 9;
+                break;
+        case GPU_LIT_PERFMON_PMMGPCTPC_DOMAIN_COUNT:
+                ret = 7;
+                break;
+        case GPU_LIT_PERFMON_PMMFBP_LTC_DOMAIN_START:
+                ret = 2;
+                break;
+        case GPU_LIT_PERFMON_PMMFBP_LTC_DOMAIN_COUNT:
+                ret = 4;
+                break;
+        case GPU_LIT_PERFMON_PMMFBP_ROP_DOMAIN_START:
+                ret = 6;
+                break;
+        case GPU_LIT_PERFMON_PMMFBP_ROP_DOMAIN_COUNT:
+                ret = 2;
+                break;
         default:
                 nvgpu_err(g, "Missing definition %d", value);
                 BUG();