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authorRichard Zhao <rizhao@nvidia.com>2018-03-19 17:45:14 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-29 21:54:20 -0400
commitd436ad67b60eef68c7d5551b539490f8efb24387 (patch)
tree21283a39c70ca65f96cc2ecaf600e8880cba5083 /drivers/gpu/nvgpu/gv100/hal_gv100.c
parentbcab5c148607867eea29e2a2ac82c6b967995525 (diff)
gpu: nvgpu: add gops.fifo.channel_suspend/channel_resume
RM Server acts differently for channel suspend/resume. Jira VQRM-3058 Change-Id: If41e3099164654db448d1157fd7f51dd00c5e201 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1679707 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/hal_gv100.c')
-rw-r--r--drivers/gpu/nvgpu/gv100/hal_gv100.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index f3e25ddd..2f2d278e 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -514,6 +514,8 @@ static const struct gpu_ops gv100_ops = {
514 .ch_abort_clean_up = gk20a_channel_abort_clean_up, 514 .ch_abort_clean_up = gk20a_channel_abort_clean_up,
515 .check_tsg_ctxsw_timeout = gk20a_fifo_check_tsg_ctxsw_timeout, 515 .check_tsg_ctxsw_timeout = gk20a_fifo_check_tsg_ctxsw_timeout,
516 .check_ch_ctxsw_timeout = gk20a_fifo_check_ch_ctxsw_timeout, 516 .check_ch_ctxsw_timeout = gk20a_fifo_check_ch_ctxsw_timeout,
517 .channel_suspend = gk20a_channel_suspend,
518 .channel_resume = gk20a_channel_resume,
517#ifdef CONFIG_TEGRA_GK20A_NVHOST 519#ifdef CONFIG_TEGRA_GK20A_NVHOST
518 .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, 520 .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
519 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf, 521 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf,