diff options
author | Seema Khowala <seemaj@nvidia.com> | 2018-03-27 18:18:53 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-12 13:43:43 -0400 |
commit | 9fbfffbed024a46f3f94a54327e045e3830f4895 (patch) | |
tree | 50b9f6125249de20bcb2b79211a0c5446be22520 /drivers/gpu/nvgpu/gv100/hal_gv100.c | |
parent | 040da8c01da0da58c4ca904b5d3a47298e94a001 (diff) |
gpu: nvgpu: gv100: support clock gating
-Generated list for addr/value pairs using
gen_gating_reglist.pl --target_ip=gv100 --soc=t194
-Comment out addresses triggering priv/pbus errors
Bug 200399393
Change-Id: Ica0fd65070a7100f20afa32184f4a2e3cad6d0c2
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1683101
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/hal_gv100.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 52 |
1 files changed, 51 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index fe235f89..fef2fb94 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -82,7 +82,6 @@ | |||
82 | #include "gv11b/pmu_gv11b.h" | 82 | #include "gv11b/pmu_gv11b.h" |
83 | #include "gv11b/fifo_gv11b.h" | 83 | #include "gv11b/fifo_gv11b.h" |
84 | #include "gv11b/regops_gv11b.h" | 84 | #include "gv11b/regops_gv11b.h" |
85 | #include "gv11b/gv11b_gating_reglist.h" | ||
86 | #include "gv11b/subctx_gv11b.h" | 85 | #include "gv11b/subctx_gv11b.h" |
87 | 86 | ||
88 | #include "gv100.h" | 87 | #include "gv100.h" |
@@ -98,6 +97,7 @@ | |||
98 | #include "gv100/pmu_gv100.h" | 97 | #include "gv100/pmu_gv100.h" |
99 | #include "gv100/nvlink_gv100.h" | 98 | #include "gv100/nvlink_gv100.h" |
100 | #include "gv100/regops_gv100.h" | 99 | #include "gv100/regops_gv100.h" |
100 | #include "gv100/gv100_gating_reglist.h" | ||
101 | 101 | ||
102 | #include <nvgpu/bus.h> | 102 | #include <nvgpu/bus.h> |
103 | #include <nvgpu/debug.h> | 103 | #include <nvgpu/debug.h> |
@@ -456,6 +456,56 @@ static const struct gpu_ops gv100_ops = { | |||
456 | .init_nvlink = gv100_fb_init_nvlink, | 456 | .init_nvlink = gv100_fb_init_nvlink, |
457 | .enable_nvlink = gv100_fb_enable_nvlink, | 457 | .enable_nvlink = gv100_fb_enable_nvlink, |
458 | }, | 458 | }, |
459 | .clock_gating = { | ||
460 | .slcg_bus_load_gating_prod = | ||
461 | gv100_slcg_bus_load_gating_prod, | ||
462 | .slcg_ce2_load_gating_prod = | ||
463 | gv100_slcg_ce2_load_gating_prod, | ||
464 | .slcg_chiplet_load_gating_prod = | ||
465 | gv100_slcg_chiplet_load_gating_prod, | ||
466 | .slcg_ctxsw_firmware_load_gating_prod = | ||
467 | gv100_slcg_ctxsw_firmware_load_gating_prod, | ||
468 | .slcg_fb_load_gating_prod = | ||
469 | gv100_slcg_fb_load_gating_prod, | ||
470 | .slcg_fifo_load_gating_prod = | ||
471 | gv100_slcg_fifo_load_gating_prod, | ||
472 | .slcg_gr_load_gating_prod = | ||
473 | gr_gv100_slcg_gr_load_gating_prod, | ||
474 | .slcg_ltc_load_gating_prod = | ||
475 | ltc_gv100_slcg_ltc_load_gating_prod, | ||
476 | .slcg_perf_load_gating_prod = | ||
477 | gv100_slcg_perf_load_gating_prod, | ||
478 | .slcg_priring_load_gating_prod = | ||
479 | gv100_slcg_priring_load_gating_prod, | ||
480 | .slcg_pmu_load_gating_prod = | ||
481 | gv100_slcg_pmu_load_gating_prod, | ||
482 | .slcg_therm_load_gating_prod = | ||
483 | gv100_slcg_therm_load_gating_prod, | ||
484 | .slcg_xbar_load_gating_prod = | ||
485 | gv100_slcg_xbar_load_gating_prod, | ||
486 | .blcg_bus_load_gating_prod = | ||
487 | gv100_blcg_bus_load_gating_prod, | ||
488 | .blcg_ce_load_gating_prod = | ||
489 | gv100_blcg_ce_load_gating_prod, | ||
490 | .blcg_ctxsw_firmware_load_gating_prod = | ||
491 | gv100_blcg_ctxsw_firmware_load_gating_prod, | ||
492 | .blcg_fb_load_gating_prod = | ||
493 | gv100_blcg_fb_load_gating_prod, | ||
494 | .blcg_fifo_load_gating_prod = | ||
495 | gv100_blcg_fifo_load_gating_prod, | ||
496 | .blcg_gr_load_gating_prod = | ||
497 | gv100_blcg_gr_load_gating_prod, | ||
498 | .blcg_ltc_load_gating_prod = | ||
499 | gv100_blcg_ltc_load_gating_prod, | ||
500 | .blcg_pwr_csb_load_gating_prod = | ||
501 | gv100_blcg_pwr_csb_load_gating_prod, | ||
502 | .blcg_pmu_load_gating_prod = | ||
503 | gv100_blcg_pmu_load_gating_prod, | ||
504 | .blcg_xbar_load_gating_prod = | ||
505 | gv100_blcg_xbar_load_gating_prod, | ||
506 | .pg_gr_load_gating_prod = | ||
507 | gr_gv100_pg_gr_load_gating_prod, | ||
508 | }, | ||
459 | .fifo = { | 509 | .fifo = { |
460 | .get_preempt_timeout = gv100_fifo_get_preempt_timeout, | 510 | .get_preempt_timeout = gv100_fifo_get_preempt_timeout, |
461 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, | 511 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, |