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authorDeepak Nibade <dnibade@nvidia.com>2018-06-08 00:01:58 -0400
committerTejal Kudav <tkudav@nvidia.com>2018-06-14 09:44:08 -0400
commit9c5bcbe6f2b71592c3a07d5884b68ad10fdffffd (patch)
tree2d42e8c7de8bca04ea852296e51c2b4b97293002 /drivers/gpu/nvgpu/gv100/hal_gv100.c
parent4e66f214fc03f088b13e1f1cdc097df67dd2c062 (diff)
gpu: nvgpu: Add HALs for mmu_fault setup and info
Add below HALs to setup mmu_fault configuration registers and to read information registers and set them on Volta gops.fb.write_mmu_fault_buffer_lo_hi() gops.fb.write_mmu_fault_buffer_get() gops.fb.write_mmu_fault_buffer_size() gops.fb.write_mmu_fault_status() gops.fb.read_mmu_fault_buffer_get() gops.fb.read_mmu_fault_buffer_put() gops.fb.read_mmu_fault_buffer_size() gops.fb.read_mmu_fault_addr_lo_hi() gops.fb.read_mmu_fault_inst_lo_hi() gops.fb.read_mmu_fault_info() gops.fb.read_mmu_fault_status() Jira NVGPUT-13 Change-Id: Ia99568ff905ada3c035efb4565613576012f5bef Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1744063 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/hal_gv100.c')
-rw-r--r--drivers/gpu/nvgpu/gv100/hal_gv100.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index 1d6f59b3..4e1c3fb8 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -473,6 +473,23 @@ static const struct gpu_ops gv100_ops = {
473 .enable_nvlink = gv100_fb_enable_nvlink, 473 .enable_nvlink = gv100_fb_enable_nvlink,
474 .enable_hub_intr = gv11b_fb_enable_hub_intr, 474 .enable_hub_intr = gv11b_fb_enable_hub_intr,
475 .disable_hub_intr = gv11b_fb_disable_hub_intr, 475 .disable_hub_intr = gv11b_fb_disable_hub_intr,
476 .write_mmu_fault_buffer_lo_hi =
477 fb_gv11b_write_mmu_fault_buffer_lo_hi,
478 .write_mmu_fault_buffer_get =
479 fb_gv11b_write_mmu_fault_buffer_get,
480 .write_mmu_fault_buffer_size =
481 fb_gv11b_write_mmu_fault_buffer_size,
482 .write_mmu_fault_status = fb_gv11b_write_mmu_fault_status,
483 .read_mmu_fault_buffer_get =
484 fb_gv11b_read_mmu_fault_buffer_get,
485 .read_mmu_fault_buffer_put =
486 fb_gv11b_read_mmu_fault_buffer_put,
487 .read_mmu_fault_buffer_size =
488 fb_gv11b_read_mmu_fault_buffer_size,
489 .read_mmu_fault_addr_lo_hi = fb_gv11b_read_mmu_fault_addr_lo_hi,
490 .read_mmu_fault_inst_lo_hi = fb_gv11b_read_mmu_fault_inst_lo_hi,
491 .read_mmu_fault_info = fb_gv11b_read_mmu_fault_info,
492 .read_mmu_fault_status = fb_gv11b_read_mmu_fault_status,
476 }, 493 },
477 .clock_gating = { 494 .clock_gating = {
478 .slcg_bus_load_gating_prod = 495 .slcg_bus_load_gating_prod =