gpu: nvgpu: gv100: BOOTSTRAP_GR_FALCONS using RPC

- Created nv_pmu_rpc_struct_acr_bootstrap_gr_falcons struct
- gv100_load_falcon_ucode() function to bootstrap GR
flacons using RPC, wait for INIT_WPR_REGION before
creating & executing BOOTSTRAP_GR_FALCONS RPC.
- Added code to handle BOOTSTRAP_GR_FALCONS ack in
RPC handler

Change-Id: If70dc75bb2789970382853fb001d970a346b2915
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1613316
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index cf9ca9d8..418ff45e 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -574,7 +574,7 @@ static const struct gpu_ops gv100_ops = {
         },
         .pmu = {
                 .init_wpr_region = gv100_pmu_init_acr,
-                .load_lsfalcon_ucode = gp106_load_falcon_ucode,
+                .load_lsfalcon_ucode = gv100_load_falcon_ucode,
                 .is_lazy_bootstrap = gp106_is_lazy_bootstrap,
                 .is_priv_load = gp106_is_priv_load,
                 .prepare_ucode = gp106_prepare_ucode_blob,