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authorAlexander Lewkowicz <alewkowicz@nvidia.com>2017-08-04 18:51:42 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-15 11:20:25 -0400
commitbacbc7331223b0f80b36d7eff43009e5d7ac9aae (patch)
tree409c7bb77ab5018a77c6c7cf1ae3a7d5dbb7cd1b /drivers/gpu/nvgpu/gv100/gv100.h
parent8ab6445df5b24c200ac4e346684119a85008e0e3 (diff)
gpu: nvgpu: gv11b: Fix computation of offset
When reading NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0, we are not reading the expected value. The offset of the sm is not added to the PRI. JIRA GPUT19X-75 bug: ? Change-Id: I2eeb24505e928044c3a3331fa5f493a3f118a3c8 Signed-off-by: Alexander Lewkowicz <alewkowicz@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1533953 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/gv100.h')
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