diff options
author | smadhavan <smadhavan@nvidia.com> | 2018-09-11 01:59:00 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-14 02:45:26 -0400 |
commit | 0ece054d13a67ab01a1074bd7f06f941593251dc (patch) | |
tree | 57e0c485da65eecb7de13ae9fdcebdb88c41973d /drivers/gpu/nvgpu/gv100/gr_gv100.h | |
parent | a605a09e2a74f31abc3755a6e383311317e3b909 (diff) |
nvgpu: gv100: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in gv100 by renaming
them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when
there is no keyword repetition between file name and directory or
'NVGPU_HEADER-NAME' when there is repetition.
JIRA NVGPU-1028
Change-Id: I0e4fabc8b31d0bfd66ab541435ac8813e5cc4c1d
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1815554
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/gr_gv100.h')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/gr_gv100.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.h b/drivers/gpu/nvgpu/gv100/gr_gv100.h index 6d6b4170..aae87f09 100644 --- a/drivers/gpu/nvgpu/gv100/gr_gv100.h +++ b/drivers/gpu/nvgpu/gv100/gr_gv100.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GR_GV100_H_ | 25 | #ifndef NVGPU_GR_GV100_H |
26 | #define _NVGPU_GR_GV100_H_ | 26 | #define NVGPU_GR_GV100_H |
27 | 27 | ||
28 | void gr_gv100_bundle_cb_defaults(struct gk20a *g); | 28 | void gr_gv100_bundle_cb_defaults(struct gk20a *g); |
29 | void gr_gv100_cb_size_default(struct gk20a *g); | 29 | void gr_gv100_cb_size_default(struct gk20a *g); |
@@ -48,4 +48,4 @@ void gr_gv100_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr, | |||
48 | u32 *priv_addr_table, u32 *t); | 48 | u32 *priv_addr_table, u32 *t); |
49 | u32 gr_gv100_get_hw_accessor_stream_out_mode(void); | 49 | u32 gr_gv100_get_hw_accessor_stream_out_mode(void); |
50 | void gr_gv100_init_hwpm_pmm_register(struct gk20a *g); | 50 | void gr_gv100_init_hwpm_pmm_register(struct gk20a *g); |
51 | #endif | 51 | #endif /* NVGPU_GR_GV100_H */ |