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authorNicolas Benech <nbenech@nvidia.com>2018-08-23 16:23:52 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-05 23:39:08 -0400
commit2eface802a4aea417206bcdda689a65cf47d300b (patch)
tree502af9d48004af4edf8f02a2a7cf751ef5a11325 /drivers/gpu/nvgpu/gv100/flcn_gv100.c
parentb44c7fdb114a63ab98fffc0f246776b56399ff64 (diff)
gpu: nvgpu: Fix mutex MISRA 17.7 violations
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. This patch contains fix for calls to nvgpu_mutex_init and improves related error handling. JIRA NVGPU-677 Change-Id: I609fa138520cc7ccfdd5aa0e7fd28c8ca0b3a21c Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1805598 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/flcn_gv100.c')
-rw-r--r--drivers/gpu/nvgpu/gv100/flcn_gv100.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gv100/flcn_gv100.c b/drivers/gpu/nvgpu/gv100/flcn_gv100.c
index 5820d6c9..5167e3f0 100644
--- a/drivers/gpu/nvgpu/gv100/flcn_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/flcn_gv100.c
@@ -29,27 +29,29 @@
29 29
30#include <nvgpu/hw/gv100/hw_falcon_gv100.h> 30#include <nvgpu/hw/gv100/hw_falcon_gv100.h>
31 31
32void gv100_falcon_hal_sw_init(struct nvgpu_falcon *flcn) 32int gv100_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
33{ 33{
34 struct gk20a *g = flcn->g; 34 struct gk20a *g = flcn->g;
35 int err = 0;
35 36
36 switch (flcn->flcn_id) { 37 if (flcn->flcn_id == FALCON_ID_MINION) {
37 case FALCON_ID_MINION:
38 flcn->flcn_base = g->nvlink.minion_base; 38 flcn->flcn_base = g->nvlink.minion_base;
39 flcn->is_falcon_supported = true; 39 flcn->is_falcon_supported = true;
40 flcn->is_interrupt_enabled = true; 40 flcn->is_interrupt_enabled = true;
41 break;
42 default:
43 break;
44 }
45 41
46 if (flcn->is_falcon_supported) { 42 err = nvgpu_mutex_init(&flcn->copy_lock);
47 nvgpu_mutex_init(&flcn->copy_lock); 43 if (err != 0) {
44 nvgpu_err(g, "Error in flcn.copy_lock mutex initialization");
45 return err;
46 }
47
48 gk20a_falcon_ops(flcn); 48 gk20a_falcon_ops(flcn);
49 } else { 49 } else {
50 /* 50 /*
51 * Fall back 51 * Fall back
52 */ 52 */
53 gp106_falcon_hal_sw_init(flcn); 53 err = gp106_falcon_hal_sw_init(flcn);
54 } 54 }
55
56 return err;
55} 57}