gpu: nvgpu: Reorg mc HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the mc
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I26d74c14661a193af7e8d90dd672b73010e5f841
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1509601
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

3 files changed, 29 insertions, 21 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index d004cf3d..af1195ea 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -19,6 +19,7 @@
 #include "gk20a/bus_gk20a.h"
 #include "gk20a/pramin_gk20a.h"
 #include "gk20a/flcn_gk20a.h"
+#include "gk20a/mc_gk20a.h"
 
 #include "gp10b/gr_gp10b.h"
 #include "gp10b/fecs_trace_gp10b.h"
@@ -207,6 +208,22 @@ static const struct gpu_ops gp10b_ops = {
                 .pg_gr_load_gating_prod =
                         gr_gp10b_pg_gr_load_gating_prod,
         },
+        .mc = {
+                .intr_enable = mc_gp10b_intr_enable,
+                .intr_unit_config = mc_gp10b_intr_unit_config,
+                .isr_stall = mc_gp10b_isr_stall,
+                .intr_stall = mc_gp10b_intr_stall,
+                .intr_stall_pause = mc_gp10b_intr_stall_pause,
+                .intr_stall_resume = mc_gp10b_intr_stall_resume,
+                .intr_nonstall = mc_gp10b_intr_nonstall,
+                .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause,
+                .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume,
+                .enable = gk20a_mc_enable,
+                .disable = gk20a_mc_disable,
+                .reset = gk20a_mc_reset,
+                .boot_0 = gk20a_mc_boot_0,
+                .is_intr1_pending = mc_gp10b_is_intr1_pending,
+        },
         .cde = {
                 .get_program_numbers = gp10b_cde_get_program_numbers,
                 .need_scatter_buffer = gp10b_need_scatter_buffer,
@@ -227,6 +244,7 @@ int gp10b_init_hal(struct gk20a *g)
 
         gops->ltc = gp10b_ops.ltc;
         gops->clock_gating = gp10b_ops.clock_gating;
+        gops->mc = gp10b_ops.mc;
         gops->cde = gp10b_ops.cde;
         gops->falcon = gp10b_ops.falcon;
 
@@ -274,7 +292,6 @@ int gp10b_init_hal(struct gk20a *g)
 #endif
 
         gk20a_init_bus(gops);
-        gp10b_init_mc(gops);
         gp10b_init_priv_ring(gops);
         gp10b_init_gr(gops);
         gp10b_init_fecs_trace_ops(gops);
diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
index 39ad8f9b..5a1d5dcc 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
@@ -156,7 +156,7 @@ void mc_gp10b_intr_nonstall_resume(struct gk20a *g)
                         g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]);
 }
 
-static bool mc_gp10b_is_intr1_pending(struct gk20a *g,
+bool mc_gp10b_is_intr1_pending(struct gk20a *g,
                                       enum nvgpu_unit unit, u32 mc_intr_1)
 {
         u32 mask = 0;
@@ -179,21 +179,3 @@ static bool mc_gp10b_is_intr1_pending(struct gk20a *g,
 
         return is_pending;
 }
-
-void gp10b_init_mc(struct gpu_ops *gops)
-{
-        gops->mc.intr_enable = mc_gp10b_intr_enable;
-        gops->mc.intr_unit_config = mc_gp10b_intr_unit_config;
-        gops->mc.isr_stall = mc_gp10b_isr_stall;
-        gops->mc.intr_stall = mc_gp10b_intr_stall;
-        gops->mc.intr_stall_pause = mc_gp10b_intr_stall_pause;
-        gops->mc.intr_stall_resume = mc_gp10b_intr_stall_resume;
-        gops->mc.intr_nonstall = mc_gp10b_intr_nonstall;
-        gops->mc.intr_nonstall_pause = mc_gp10b_intr_nonstall_pause;
-        gops->mc.intr_nonstall_resume = mc_gp10b_intr_nonstall_resume;
-        gops->mc.enable = gk20a_mc_enable;
-        gops->mc.disable = gk20a_mc_disable;
-        gops->mc.reset = gk20a_mc_reset;
-        gops->mc.boot_0 = gk20a_mc_boot_0;
-        gops->mc.is_intr1_pending = mc_gp10b_is_intr1_pending;
-}
diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
index ceba0b39..00e9dd1d 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.h
@@ -20,9 +20,18 @@ enum MC_INTERRUPT_REGLIST {
         NVGPU_MC_INTR_NONSTALLING,
 };
 
-void gp10b_init_mc(struct gpu_ops *gops);
 void mc_gp10b_intr_enable(struct gk20a *g);
 void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable,
                 bool is_stalling, u32 mask);
 void mc_gp10b_isr_stall(struct gk20a *g);
+bool mc_gp10b_is_intr1_pending(struct gk20a *g,
+                                      enum nvgpu_unit unit, u32 mc_intr_1);
+
+u32 mc_gp10b_intr_stall(struct gk20a *g);
+void mc_gp10b_intr_stall_pause(struct gk20a *g);
+void mc_gp10b_intr_stall_resume(struct gk20a *g);
+u32 mc_gp10b_intr_nonstall(struct gk20a *g);
+void mc_gp10b_intr_nonstall_pause(struct gk20a *g);
+void mc_gp10b_intr_nonstall_resume(struct gk20a *g);
+
 #endif