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author | Jussi Rasanen <jrasanen@nvidia.com> | 2015-01-16 05:55:28 -0500 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:03 -0500 |
commit | 99d41c05f5f724f960e5b0320cdadac356750e9c (patch) | |
tree | 66f5b913f22cebe818c16d0305a795287c0be7c4 /drivers/gpu/nvgpu/gp10b | |
parent | c0fcbdf2fc853e6eaf60af131c6de1624d4d4858 (diff) |
gpu: nvgpu: read gobs_per_comptagline_per_slice
Add code to read NV_PLTCG_LTCS_LTSS_CBC_PARAM2_GOBS_PER_COMPTAGLINE_PER_SLICE
during t18x ltc init and store it for use in CDE code.
Change-Id: I4d4a3a6c7e3ad369d8359ff838e7040a0521b441
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/673150
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/ltc_gp10b.c | 10 |
2 files changed, 18 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h index 32683dc2..01b66c9c 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -174,6 +174,14 @@ static inline u32 ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(u32 r) | |||
174 | { | 174 | { |
175 | return (r >> 28) & 0xf; | 175 | return (r >> 28) & 0xf; |
176 | } | 176 | } |
177 | static inline u32 ltc_ltcs_ltss_cbc_param2_r(void) | ||
178 | { | ||
179 | return 0x0017e3f4; | ||
180 | } | ||
181 | static inline u32 ltc_ltcs_ltss_cbc_param2_gobs_per_comptagline_per_slice_v(u32 r) | ||
182 | { | ||
183 | return (r >> 0) & 0xffff; | ||
184 | } | ||
177 | static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_r(void) | 185 | static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_r(void) |
178 | { | 186 | { |
179 | return 0x0017e2ac; | 187 | return 0x0017e2ac; |
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c index 03454240..beda3038 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP10B L2 | 2 | * GP10B L2 |
3 | * | 3 | * |
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -59,6 +59,10 @@ static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) | |||
59 | 512 << ltc_ltcs_ltss_cbc_param_cache_line_size_v(cbc_param); | 59 | 512 << ltc_ltcs_ltss_cbc_param_cache_line_size_v(cbc_param); |
60 | u32 slices_per_ltc = | 60 | u32 slices_per_ltc = |
61 | ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(cbc_param); | 61 | ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(cbc_param); |
62 | u32 cbc_param2 = | ||
63 | gk20a_readl(g, ltc_ltcs_ltss_cbc_param2_r()); | ||
64 | u32 gobs_per_comptagline_per_slice = | ||
65 | ltc_ltcs_ltss_cbc_param2_gobs_per_comptagline_per_slice_v(cbc_param2); | ||
62 | 66 | ||
63 | u32 compbit_backing_size; | 67 | u32 compbit_backing_size; |
64 | 68 | ||
@@ -96,6 +100,8 @@ static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) | |||
96 | compbit_backing_size); | 100 | compbit_backing_size); |
97 | gk20a_dbg_info("max comptag lines : %d", | 101 | gk20a_dbg_info("max comptag lines : %d", |
98 | max_comptag_lines); | 102 | max_comptag_lines); |
103 | gk20a_dbg_info("gobs_per_comptagline_per_slice: %d", | ||
104 | gobs_per_comptagline_per_slice); | ||
99 | 105 | ||
100 | if (tegra_platform_is_linsim()) | 106 | if (tegra_platform_is_linsim()) |
101 | err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size); | 107 | err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size); |
@@ -112,6 +118,7 @@ static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) | |||
112 | gr->comptags_per_cacheline = comptags_per_cacheline; | 118 | gr->comptags_per_cacheline = comptags_per_cacheline; |
113 | gr->slices_per_ltc = slices_per_ltc; | 119 | gr->slices_per_ltc = slices_per_ltc; |
114 | gr->cacheline_size = cacheline_size; | 120 | gr->cacheline_size = cacheline_size; |
121 | gr->gobs_per_comptagline_per_slice = gobs_per_comptagline_per_slice; | ||
115 | 122 | ||
116 | return 0; | 123 | return 0; |
117 | } | 124 | } |
@@ -136,3 +143,4 @@ void gp10b_init_ltc(struct gpu_ops *gops) | |||
136 | gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs; | 143 | gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs; |
137 | #endif | 144 | #endif |
138 | } | 145 | } |
146 | |||