diff options
author | Peter Daifuku <pdaifuku@nvidia.com> | 2017-10-13 20:06:30 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-25 23:24:10 -0400 |
commit | 6bf40e523740279761f3fdc3d84000acc2f62aba (patch) | |
tree | bf56295c292b5ee9bee232141bc0ebd262f02225 /drivers/gpu/nvgpu/gp10b | |
parent | 0dcf0ede812aa55aa106a5e6c2f86216fcbfd5e0 (diff) |
gpu: nvgpu: add max_css_buffer_size characteristic
Add max_css_buffer_size to gpu characteristics. In the virtual
case, the size of the cycle stats snapshot buffer is constrained
by the size of the mempool shared between the guest OS and the
RM server, so tools need to find out what is the maximum size
allowed.
In the native case, we return 0xffffffff to indicate
that the buffer size is unbounded (subject to memory availability),
in the virtual case we return the size of the mempool.
Also collapse native init_cyclestats functions to a single version,
as each chip had identical versions of the code.
JIRA ESRM-54
Bug 200296210
Change-Id: I71764d32c6e71a0d101bd40f274eaa4bea3e5b11
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578930
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 2 |
3 files changed, 1 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 813b8891..a01cfbfa 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -1615,18 +1615,6 @@ int gr_gp10b_init_fs_state(struct gk20a *g) | |||
1615 | return gr_gm20b_init_fs_state(g); | 1615 | return gr_gm20b_init_fs_state(g); |
1616 | } | 1616 | } |
1617 | 1617 | ||
1618 | void gr_gp10b_init_cyclestats(struct gk20a *g) | ||
1619 | { | ||
1620 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
1621 | g->gpu_characteristics.flags |= | ||
1622 | NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS; | ||
1623 | g->gpu_characteristics.flags |= | ||
1624 | NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT; | ||
1625 | #else | ||
1626 | (void)g; | ||
1627 | #endif | ||
1628 | } | ||
1629 | |||
1630 | void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) | 1618 | void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) |
1631 | { | 1619 | { |
1632 | nvgpu_tegra_fuse_write_bypass(g, 0x1); | 1620 | nvgpu_tegra_fuse_write_bypass(g, 0x1); |
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 9ddc0375..a537f147 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |||
@@ -115,7 +115,6 @@ void gr_gp10b_commit_global_bundle_cb(struct gk20a *g, | |||
115 | struct channel_ctx_gk20a *ch_ctx, | 115 | struct channel_ctx_gk20a *ch_ctx, |
116 | u64 addr, u64 size, bool patch); | 116 | u64 addr, u64 size, bool patch); |
117 | int gr_gp10b_load_smid_config(struct gk20a *g); | 117 | int gr_gp10b_load_smid_config(struct gk20a *g); |
118 | void gr_gp10b_init_cyclestats(struct gk20a *g); | ||
119 | void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index); | 118 | void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index); |
120 | void gr_gp10b_get_access_map(struct gk20a *g, | 119 | void gr_gp10b_get_access_map(struct gk20a *g, |
121 | u32 **whitelist, int *num_entries); | 120 | u32 **whitelist, int *num_entries); |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 98e143f0..7b5cc2ac 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -243,7 +243,7 @@ static const struct gpu_ops gp10b_ops = { | |||
243 | .get_max_fbps_count = gr_gm20b_get_max_fbps_count, | 243 | .get_max_fbps_count = gr_gm20b_get_max_fbps_count, |
244 | .init_sm_dsm_reg_info = gr_gm20b_init_sm_dsm_reg_info, | 244 | .init_sm_dsm_reg_info = gr_gm20b_init_sm_dsm_reg_info, |
245 | .wait_empty = gr_gp10b_wait_empty, | 245 | .wait_empty = gr_gp10b_wait_empty, |
246 | .init_cyclestats = gr_gp10b_init_cyclestats, | 246 | .init_cyclestats = gr_gm20b_init_cyclestats, |
247 | .set_sm_debug_mode = gr_gk20a_set_sm_debug_mode, | 247 | .set_sm_debug_mode = gr_gk20a_set_sm_debug_mode, |
248 | .enable_cde_in_fecs = gr_gm20b_enable_cde_in_fecs, | 248 | .enable_cde_in_fecs = gr_gm20b_enable_cde_in_fecs, |
249 | .bpt_reg_info = gr_gm20b_bpt_reg_info, | 249 | .bpt_reg_info = gr_gm20b_bpt_reg_info, |