gpu: nvgpu: Reorg gr_ctx HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
gr_ctx sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I783d8e8919d8694ad2aa0d285e4c5a2b62580f48
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1527417
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 12 insertions, 12 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c
index 2bb4a313..0c1798c0 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c
@@ -3,7 +3,7 @@
  *
  * GM20B Graphics Context
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -22,7 +22,7 @@
 #include "gk20a/gk20a.h"
 #include "gr_ctx_gp10b.h"
 
-static int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name)
+int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name)
 {
         switch (index) {
 #ifdef GP10B_NETLIST_IMAGE_FW_NAME
@@ -57,7 +57,7 @@ static int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name)
         return -1;
 }
 
-static bool gr_gp10b_is_firmware_defined(void)
+bool gr_gp10b_is_firmware_defined(void)
 {
 #ifdef GP10B_NETLIST_IMAGE_FW_NAME
         return true;
@@ -65,9 +65,3 @@ static bool gr_gp10b_is_firmware_defined(void)
         return false;
 #endif
 }
-
-void gp10b_init_gr_ctx(struct gpu_ops *gops) {
-        gops->gr_ctx.get_netlist_name = gr_gp10b_get_netlist_name;
-        gops->gr_ctx.is_fw_defined = gr_gp10b_is_firmware_defined;
-        gops->gr_ctx.use_dma_for_fw_bootstrap = true;
-}
diff --git a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h
index b5c76d24..45415a01 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h
@@ -1,7 +1,7 @@
 /*
  * GP10B Graphics Context
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -23,6 +23,7 @@
 /* production netlist, one and only one from below */
 #define GP10B_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_A
 
-void gp10b_init_gr_ctx(struct gpu_ops *gops);
+int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name);
+bool gr_gp10b_is_firmware_defined(void);
 
 #endif /*__GR_CTX_GP10B_H__*/
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index feac284b..80018910 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -279,6 +279,10 @@ static const struct gpu_ops gp10b_ops = {
                 .resetup_ramfc = gp10b_fifo_resetup_ramfc,
                 .device_info_fault_id = top_device_info_data_fault_id_enum_v,
         },
+        .gr_ctx = {
+                .get_netlist_name = gr_gp10b_get_netlist_name,
+                .is_fw_defined = gr_gp10b_is_firmware_defined,
+        },
         .mc = {
                 .intr_enable = mc_gp10b_intr_enable,
                 .intr_unit_config = mc_gp10b_intr_unit_config,
@@ -352,6 +356,7 @@ int gp10b_init_hal(struct gk20a *g)
         gops->ce2 = gp10b_ops.ce2;
         gops->clock_gating = gp10b_ops.clock_gating;
         gops->fifo = gp10b_ops.fifo;
+        gops->gr_ctx = gp10b_ops.gr_ctx;
         gops->mc = gp10b_ops.mc;
         gops->debug = gp10b_ops.debug;
         gops->dbg_session_ops = gp10b_ops.dbg_session_ops;
@@ -369,6 +374,7 @@ int gp10b_init_hal(struct gk20a *g)
                 gp10b_ops.chip_init_gpu_characteristics;
         gops->get_litter_value = gp10b_ops.get_litter_value;
 
+        __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true);
         __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
 
 #ifdef CONFIG_TEGRA_ACR
@@ -412,7 +418,6 @@ int gp10b_init_hal(struct gk20a *g)
         gp10b_init_gr(g);
         gp10b_init_fecs_trace_ops(gops);
         gp10b_init_fb(gops);
-        gp10b_init_gr_ctx(gops);
         gp10b_init_mm(gops);
         gp10b_init_pmu_ops(g);
         gp10b_init_regops(gops);