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authorSupriya <ssharatkumar@nvidia.com>2017-10-31 02:24:53 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-27 04:49:17 -0500
commit6194cfdef52afcb17aa2921685f370e4c5d27819 (patch)
treedd890e3ea5bd61f204804236dffedd551f30b4fa /drivers/gpu/nvgpu/gp10b
parent536ec21b565ab1368b53a26d6ec7ed05857f0775 (diff)
gpu: nvgpu: split init_falcon_setup_hw
This CL is as part of phased changes to support NO LSPMU Changes done are to add new pmu ops : - setup_apertures - update_lspmu_cmdline_args These would be called from pmu op init_falcon_setup_hw JIRA NVGPU-296 Change-Id: Idbcec5c93ca3150df5c9fb81d65b9fce778cecb8 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589004 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 335eb465..f13c2735 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -689,6 +689,9 @@ int gp10b_init_hal(struct gk20a *g)
689 gops->pmu.falcon_clear_halt_interrupt_status = 689 gops->pmu.falcon_clear_halt_interrupt_status =
690 clear_halt_interrupt_status, 690 clear_halt_interrupt_status,
691 gops->pmu.init_falcon_setup_hw = gm20b_init_pmu_setup_hw1, 691 gops->pmu.init_falcon_setup_hw = gm20b_init_pmu_setup_hw1,
692 gops->pmu.update_lspmu_cmdline_args =
693 gm20b_update_lspmu_cmdline_args;
694 gops->pmu.setup_apertures = gm20b_setup_apertures;
692 695
693 gops->pmu.init_wpr_region = gm20b_pmu_init_acr; 696 gops->pmu.init_wpr_region = gm20b_pmu_init_acr;
694 gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode; 697 gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode;