diff options
author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2014-12-03 14:20:11 -0500 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:03 -0500 |
commit | 08b8c0564866c9a37e1790f603f8f4ebdfe4dbf4 (patch) | |
tree | 3331c901bd50e69d3d7de81151e83c115ff3b7d8 /drivers/gpu/nvgpu/gp10b | |
parent | 6056528af809a9a861149e218bcaff250f964eea (diff) |
gpu: nvgpu: gp10b: enable replayable fault interrupt
Bug 1587825
Change-Id: I6df2f870b4488bb3d5ada52b4819f6f80624becd
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/659092
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mc_gp10b.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c index c7a4bc75..1760b6ad 100644 --- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP20B master | 2 | * GP20B master |
3 | * | 3 | * |
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -27,6 +27,7 @@ void mc_gp10b_intr_enable(struct gk20a *g) | |||
27 | 0xffffffff); | 27 | 0xffffffff); |
28 | g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING] = | 28 | g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING] = |
29 | mc_intr_pfifo_pending_f() | 29 | mc_intr_pfifo_pending_f() |
30 | | mc_intr_replayable_fault_pending_f() | ||
30 | | eng_intr_mask; | 31 | | eng_intr_mask; |
31 | gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), | 32 | gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), |
32 | g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING]); | 33 | g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING]); |