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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-06-07 15:44:10 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-07 23:06:55 -0400 |
commit | fc724baa4becf051b3e6647858a6ded90f1cee86 (patch) | |
tree | 8d70e917e1aa5b7bf2bc97e1bc03838e38156916 /drivers/gpu/nvgpu/gp10b/regops_gp10b.c | |
parent | 8efe596b01972c4efd39e709d51bd2e88a62d43f (diff) |
gpu: nvgpu: Add MC HAL is_intr1_pending
Add MC HAL is_intr1_pending. At the same time introduce nvgpu_unit
that is passed as parameter to is_intr1_pending. The API is passed
contents of intr1 register and an engine number, and returns true
if there's an interrupt pending for the engine.
JIRA NVGPU-26
Change-Id: I8e6363dd78572f8e41dbab2b258036ed168b6f75
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1497870
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/regops_gp10b.c')
0 files changed, 0 insertions, 0 deletions