gpu: nvgpu: secure boot HAL update

-And also enable GPCCS load using DMA

Updated/added secure boot HAL with methods
required to support multiple GPU chips.

JIRA DNVGPU-10

Change-Id: Id4546fa74954ba7be7c4544d74ad2b7a31b0ecec
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1151788
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 4 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h
index f61f6a93..18e7bdd3 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h
@@ -1,7 +1,7 @@
 /*
  * GP10B PMU
  *
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -17,5 +17,8 @@
 #define __PMU_GP10B_H_
 
 void gp10b_init_pmu_ops(struct gpu_ops *gops);
+int gp10b_load_falcon_ucode(struct gk20a *g, u32 falconidmask);
+int gp10b_pg_gr_init(struct gk20a *g, u8 grfeaturemask);
+void gp10b_write_dmatrfbase(struct gk20a *g, u32 addr);
 
 #endif /*__PMU_GP10B_H_*/