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| author | Adeel Raza <araza@nvidia.com> | 2016-05-19 20:24:44 -0400 |
|---|---|---|
| committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:16 -0500 |
| commit | 5bc7b40524e0cd30ae5a601ed685bc2d470b8d78 (patch) | |
| tree | 6d9b7915c1c9d65c2a9a4e621a20387b1a123aa0 /drivers/gpu/nvgpu/gp10b/pmu_gp10b.h | |
| parent | 140921cdf8c4c27ccf7b9844b2cc23130ba275f9 (diff) | |
gpu: nvgpu: gp10b: SM LRF ECC overcount WAR
SM LRF ECC HW overcounts errors in certain situations. Implement SW WAR
to correct error counts.
Bug 1752609
Bug 1761594
Change-Id: I79047d21e2e44e0fca3ece1da80f02faa4cd6c54
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/1150773
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/pmu_gp10b.h')
0 files changed, 0 insertions, 0 deletions