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authorSunny He <suhe@nvidia.com>2017-07-24 15:18:38 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-26 05:45:14 -0400
commitd59271c7b79080388371877fc2d10574ca42206a (patch)
tree921f6d1ddce07235d7fbd1f27e6510b8cfe56ae7 /drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
parentde3ad1a94974b08268a485136f04b8e436ef2579 (diff)
gpu: nvgpu: Remove privsecurity flag from gpu_ops
Replace privsecurity boolean flag in gpu_ops with entry in common flag system. The new common flag is NVGPU_SEC_PRIVSECURITY Jira NVGPU-74 Change-Id: I4b258f5ffbe30a6344ffba0ece51c6f5d47ebec1 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1525713 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/pmu_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/pmu_gp10b.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
index dbaf3ebf..e9a9b922 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
@@ -16,6 +16,7 @@
16#include <nvgpu/pmu.h> 16#include <nvgpu/pmu.h>
17#include <nvgpu/log.h> 17#include <nvgpu/log.h>
18#include <nvgpu/fuse.h> 18#include <nvgpu/fuse.h>
19#include <nvgpu/enabled.h>
19 20
20#include "gk20a/gk20a.h" 21#include "gk20a/gk20a.h"
21#include "gk20a/pmu_gk20a.h" 22#include "gk20a/pmu_gk20a.h"
@@ -391,10 +392,11 @@ static bool gp10b_is_pmu_supported(struct gk20a *g)
391 return true; 392 return true;
392} 393}
393 394
394void gp10b_init_pmu_ops(struct gpu_ops *gops) 395void gp10b_init_pmu_ops(struct gk20a *g)
395{ 396{
397 struct gpu_ops *gops = &g->ops;
396 gops->pmu.is_pmu_supported = gp10b_is_pmu_supported; 398 gops->pmu.is_pmu_supported = gp10b_is_pmu_supported;
397 if (gops->privsecurity) { 399 if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) {
398 gm20b_init_secure_pmu(gops); 400 gm20b_init_secure_pmu(gops);
399 gops->pmu.init_wpr_region = gm20b_pmu_init_acr; 401 gops->pmu.init_wpr_region = gm20b_pmu_init_acr;
400 gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode; 402 gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode;