gpu: nvgpu: remove GR falcons bootstrap support using VA

- GR falcons bootstrap can be done using physical or
virtual address by setting flag usevamask in PMU interface
PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS command
- With this change always setting to physical address support & removed
virtual address support along with code removal.
- Removed Linux specific code used to get info regarding WPR VA.

JIRA NVGPU-128

Change-Id: Id58f3ddc4418d61126f2a4eacb50713d278c10a0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572468
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>

1 files changed, 2 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
index 168aadb0..147cd020 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
@@ -170,10 +170,8 @@ static void gp10b_pmu_load_multiple_falcons(struct gk20a *g, u32 falconidmask,
                 cmd.cmd.acr.boot_falcons.falconidmask =
                                 falconidmask;
                 cmd.cmd.acr.boot_falcons.usevamask = 0;
-                cmd.cmd.acr.boot_falcons.wprvirtualbase.lo =
-                                u64_lo32(g->pmu.wpr_buf.gpu_va);
-                cmd.cmd.acr.boot_falcons.wprvirtualbase.hi =
-                                u64_hi32(g->pmu.wpr_buf.gpu_va);
+                cmd.cmd.acr.boot_falcons.wprvirtualbase.lo = 0x0;
+                cmd.cmd.acr.boot_falcons.wprvirtualbase.hi = 0x0;
                 gp10b_dbg_pmu("PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS:%x\n",
                                 falconidmask);
                 nvgpu_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ,