gpu: nvgpu: Force GPCCS priv load

Use priv load for GPCCS instead of DMA.

Bug 200204675

Change-Id: Ic7ea7d9e0ef98330e0bdd7606284b8fb3c5bfec8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1155281
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>

1 files changed, 2 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
index ab736fbe..7832b2ed 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
@@ -156,8 +156,7 @@ static void gp10b_pmu_load_multiple_falcons(struct gk20a *g, u32 falconidmask,
                 cmd.cmd.acr.boot_falcons.flags = flags;
                 cmd.cmd.acr.boot_falcons.falconidmask =
                                 falconidmask;
-                cmd.cmd.acr.boot_falcons.usevamask =
-                                1 << LSF_FALCON_ID_GPCCS;
+                cmd.cmd.acr.boot_falcons.usevamask = 0;
                 cmd.cmd.acr.boot_falcons.wprvirtualbase.lo =
                                 u64_lo32(g->pmu.wpr_buf.gpu_va);
                 cmd.cmd.acr.boot_falcons.wprvirtualbase.hi =
@@ -424,7 +423,7 @@ static bool gp10b_is_priv_load(u32 falcon_id)
                 enable_status = false;
                 break;
         case LSF_FALCON_ID_GPCCS:
-                enable_status = false;
+                enable_status = true;
                 break;
         default:
                 break;