gpu: nvgpu: use nvgpu_flcn_* interfaces

- set nvgpu_flcn_reset() to point to gk20a_pmu_reset()
- set PMU interrupt using nvgpu_flcn_enable_irq()
- replace pmu_idle with nvgpu_flcn_wait_idle()

JIRA NVGPU-57

Change-Id: I50d0310ae78ad266da3c1e662f1598d61ff7abb6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1469478
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
index 2222cc17..c3ad8978 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
@@ -307,7 +307,7 @@ static int gp10b_init_pmu_setup_hw1(struct gk20a *g)
         gk20a_dbg_fn("");
 
         nvgpu_mutex_acquire(&pmu->isr_mutex);
-        g->ops.pmu.reset(g);
+        nvgpu_flcn_reset(pmu->flcn);
         pmu->isr_enabled = true;
         nvgpu_mutex_release(&pmu->isr_mutex);
 
@@ -430,6 +430,6 @@ void gp10b_init_pmu_ops(struct gpu_ops *gops)
         gops->pmu.pmu_lpwr_disable_pg = NULL;
         gops->pmu.pmu_pg_param_post_init = NULL;
         gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL;
-        gops->pmu.reset = gk20a_pmu_reset;
+        gops->pmu.reset = NULL;
         gops->pmu.dump_secure_fuses = pmu_dump_security_fuses_gp10b;
 }