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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-02-01 11:33:03 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-02-09 16:44:31 -0500
commit35980eac098741a0508d6e14afb344a405de374c (patch)
tree21f92141069c0c08bf9e2e16464942e41bf4ddee /drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
parent8afd83238a9676f6737f24269a99c79071debdc2 (diff)
gpu: nvgpu: Delete PMU fecs override interface
Deleted PMU fecs override interface from pmu_api.h header file as feature not used anymore & its dependent code too. Deleted file pmu_api.h as file dont have any interfaces left inside Jira NVGPU-19 Change-Id: I490cf67ae60ce2f1de37da063199ee04835b940d Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1297370 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/pmu_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/pmu_gp10b.c75
1 files changed, 1 insertions, 74 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
index 3837fa60..b989e6a4 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
@@ -337,78 +337,6 @@ static int gp10b_init_pmu_setup_hw1(struct gk20a *g)
337 337
338} 338}
339 339
340static void pmu_handle_ecc_en_dis_msg(struct gk20a *g, struct pmu_msg *msg,
341 void *param, u32 handle, u32 status)
342{
343 struct pmu_gk20a *pmu = &g->pmu;
344 struct pmu_msg_lrf_tex_ltc_dram_en_dis *ecc =
345 &msg->msg.lrf_tex_ltc_dram.en_dis;
346 gk20a_dbg_fn("");
347
348 if (status != 0) {
349 gk20a_err(dev_from_gk20a(g), "ECC en dis cmd aborted");
350 return;
351 }
352 if (msg->msg.lrf_tex_ltc_dram.msg_type !=
353 PMU_LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS) {
354 gk20a_err(dev_from_gk20a(g),
355 "Invalid msg for LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS cmd");
356 return;
357 } else if (ecc->pmu_status != 0) {
358 gk20a_err(dev_from_gk20a(g),
359 "LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS msg status = %x",
360 ecc->pmu_status);
361 gk20a_err(dev_from_gk20a(g),
362 "LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS msg en fail = %x",
363 ecc->en_fail_mask);
364 gk20a_err(dev_from_gk20a(g),
365 "LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS msg dis fail = %x",
366 ecc->dis_fail_mask);
367 } else
368 pmu->override_done = 1;
369 gk20a_dbg_fn("done");
370}
371
372static int send_ecc_overide_en_dis_cmd(struct gk20a *g, u32 bitmask)
373{
374 struct pmu_gk20a *pmu = &g->pmu;
375 struct pmu_cmd cmd;
376 u32 seq;
377 int status;
378 u32 val;
379 gk20a_dbg_fn("");
380
381 tegra_fuse_readl(FUSE_OPT_ECC_EN, &val);
382 if (!val) {
383 gk20a_err(dev_from_gk20a(g), "Board not ECC capable");
384 return -1;
385 }
386 if (!(g->acr.capabilities &
387 ACR_LRF_TEX_LTC_DRAM_PRIV_MASK_ENABLE_LS_OVERRIDE)) {
388 gk20a_err(dev_from_gk20a(g), "check ACR capabilities");
389 return -1;
390 }
391 memset(&cmd, 0, sizeof(struct pmu_cmd));
392 cmd.hdr.unit_id = PMU_UNIT_FECS_MEM_OVERRIDE;
393 cmd.hdr.size = PMU_CMD_HDR_SIZE +
394 sizeof(struct pmu_cmd_lrf_tex_ltc_dram_en_dis);
395 cmd.cmd.lrf_tex_ltc_dram.en_dis.cmd_type =
396 PMU_LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS;
397 cmd.cmd.lrf_tex_ltc_dram.en_dis.en_dis_mask = (u8)(bitmask & 0xff);
398
399 gp10b_dbg_pmu("cmd post PMU_ECC_CMD_ID_EN_DIS_ECC");
400 pmu->override_done = 0;
401 status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ,
402 pmu_handle_ecc_en_dis_msg, NULL, &seq, ~0);
403 if (status)
404 gk20a_err(dev_from_gk20a(g), "ECC override failed");
405 else
406 pmu_wait_message_cond(pmu, gk20a_get_gr_idle_timeout(g),
407 &pmu->override_done, 1);
408 gk20a_dbg_fn("done");
409 return status;
410}
411
412static bool gp10b_is_lazy_bootstrap(u32 falcon_id) 340static bool gp10b_is_lazy_bootstrap(u32 falcon_id)
413{ 341{
414 bool enable_status = false; 342 bool enable_status = false;
@@ -495,8 +423,7 @@ void gp10b_init_pmu_ops(struct gpu_ops *gops)
495 gops->pmu.pmu_lpwr_enable_pg = NULL; 423 gops->pmu.pmu_lpwr_enable_pg = NULL;
496 gops->pmu.pmu_lpwr_disable_pg = NULL; 424 gops->pmu.pmu_lpwr_disable_pg = NULL;
497 gops->pmu.pmu_pg_param_post_init = NULL; 425 gops->pmu.pmu_pg_param_post_init = NULL;
498 gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = 426 gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL;
499 send_ecc_overide_en_dis_cmd;
500 gops->pmu.reset = gk20a_pmu_reset; 427 gops->pmu.reset = gk20a_pmu_reset;
501 gops->pmu.dump_secure_fuses = pmu_dump_security_fuses_gp10b; 428 gops->pmu.dump_secure_fuses = pmu_dump_security_fuses_gp10b;
502} 429}