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authorSunny He <suhe@nvidia.com>2017-07-31 21:54:38 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-14 18:55:19 -0400
commit959c02d6757c3c40748f7d2db1515885a5066a12 (patch)
tree58b685a52bc8b543565645227219c1c9609a50b3 /drivers/gpu/nvgpu/gp10b/mm_gp10b.h
parentee60394abc9a52182892ab54554d3e9c841080bf (diff)
gpu: nvgpu: Reorg mm HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mm sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: Ieb87a62f047510e51c52e6563d8e3fd5a65b5f28 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1537753 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.h')
-rw-r--r--drivers/gpu/nvgpu/gp10b/mm_gp10b.h19
1 files changed, 16 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
index 4cc71ea6..a0b9acd6 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License, 5 * under the terms and conditions of the GNU General Public License,
@@ -14,7 +14,20 @@
14#ifndef MM_GP10B_H 14#ifndef MM_GP10B_H
15#define MM_GP10B_H 15#define MM_GP10B_H
16 16
17struct gpu_ops; 17struct gk20a;
18struct gk20a_mmu_level;
19struct nvgpu_mem;
20struct vm_gk20a;
21
22u32 gp10b_mm_get_default_big_page_size(void);
23u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g);
24int gp10b_init_mm_setup_hw(struct gk20a *g);
25int gb10b_init_bar2_vm(struct gk20a *g);
26int gb10b_init_bar2_mm_hw_setup(struct gk20a *g);
27const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g,
28 u32 big_page_size);
29void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block,
30 struct vm_gk20a *vm);
31void gp10b_remove_bar2_vm(struct gk20a *g);
18 32
19void gp10b_init_mm(struct gpu_ops *gops);
20#endif 33#endif