gpu: nvgpu: fix pde0 target bit programming

Use entry->mem for determining the target aperture bits of the memory
block represented by entry->mem in update_gmmu_pde0_locked(), instead of
pte->mem that holds the parent memory where this bit is written to.

Previously this has worked because all page tables have been in the same
aperture, but really large userspace allocations may push a part of them
suddendly to sysmem.

Bug 1809939

Change-Id: I3372487c6ae9793018ce44552ded3fb1ba4d145a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1218636
(cherry picked from commit a92596f6e8e621e51b6afae9ab7e62044d6311eb)
Reviewed-on: http://git-master/r/1220525
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 048a4662..03bab121 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -242,7 +242,7 @@ static int update_gmmu_pde0_locked(struct vm_gk20a *vm,
 
         if (small_valid) {
                 pde_v[2] |= gmmu_new_dual_pde_address_small_sys_f(pte_addr_small);
-                pde_v[2] |= gk20a_aperture_mask(g, &pte->mem,
+                pde_v[2] |= gk20a_aperture_mask(g, &entry->mem,
                         gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(),
                         gmmu_new_dual_pde_aperture_small_video_memory_f());
                 pde_v[2] |= gmmu_new_dual_pde_vol_small_true_f();
@@ -252,7 +252,7 @@ static int update_gmmu_pde0_locked(struct vm_gk20a *vm,
         if (big_valid) {
                 pde_v[0] |= gmmu_new_dual_pde_address_big_sys_f(pte_addr_big);
                 pde_v[0] |= gmmu_new_dual_pde_vol_big_true_f();
-                pde_v[0] |= gk20a_aperture_mask(g, &pte->mem,
+                pde_v[0] |= gk20a_aperture_mask(g, &entry->mem,
                         gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(),
                         gmmu_new_dual_pde_aperture_big_video_memory_f());
                 pde_v[1] |= pte_addr_big >> 28;