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authorAlex Waterman <alexw@nvidia.com>2017-03-21 15:55:35 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-06 21:14:53 -0400
commitc9665079d7b12f22a847c62587724b4ee120ca6e (patch)
tree7882bd08193db4c34b3b8ad7df7013339da2fba1 /drivers/gpu/nvgpu/gp10b/mm_gp10b.c
parentb69020bff5dfa69cad926c9374cdbe9a62509ffd (diff)
gpu: nvgpu: rename mem_desc to nvgpu_mem
Renaming was done with the following command: $ find -type f | \ xargs sed -i 's/struct mem_desc/struct nvgpu_mem/g' Also rename mem_desc.[ch] to nvgpu_mem.[ch]. JIRA NVGPU-12 Change-Id: I69395758c22a56aa01e3dffbcded70a729bf559a Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1325547 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/mm_gp10b.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 8c6340f0..a0dc8c55 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -34,7 +34,7 @@ static u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g)
34static int gp10b_init_mm_setup_hw(struct gk20a *g) 34static int gp10b_init_mm_setup_hw(struct gk20a *g)
35{ 35{
36 struct mm_gk20a *mm = &g->mm; 36 struct mm_gk20a *mm = &g->mm;
37 struct mem_desc *inst_block = &mm->bar1.inst_block; 37 struct nvgpu_mem *inst_block = &mm->bar1.inst_block;
38 int err = 0; 38 int err = 0;
39 39
40 gk20a_dbg_fn(""); 40 gk20a_dbg_fn("");
@@ -68,7 +68,7 @@ static int gb10b_init_bar2_vm(struct gk20a *g)
68 int err; 68 int err;
69 struct mm_gk20a *mm = &g->mm; 69 struct mm_gk20a *mm = &g->mm;
70 struct vm_gk20a *vm = &mm->bar2.vm; 70 struct vm_gk20a *vm = &mm->bar2.vm;
71 struct mem_desc *inst_block = &mm->bar2.inst_block; 71 struct nvgpu_mem *inst_block = &mm->bar2.inst_block;
72 u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; 72 u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size;
73 73
74 /* BAR2 aperture size is 32MB */ 74 /* BAR2 aperture size is 32MB */
@@ -96,7 +96,7 @@ clean_up_va:
96static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g) 96static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g)
97{ 97{
98 struct mm_gk20a *mm = &g->mm; 98 struct mm_gk20a *mm = &g->mm;
99 struct mem_desc *inst_block = &mm->bar2.inst_block; 99 struct nvgpu_mem *inst_block = &mm->bar2.inst_block;
100 u64 inst_pa = gk20a_mm_inst_block_addr(g, inst_block); 100 u64 inst_pa = gk20a_mm_inst_block_addr(g, inst_block);
101 101
102 gk20a_dbg_fn(""); 102 gk20a_dbg_fn("");
@@ -375,7 +375,7 @@ static const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g,
375 return gp10b_mm_levels; 375 return gp10b_mm_levels;
376} 376}
377 377
378static void gp10b_mm_init_pdb(struct gk20a *g, struct mem_desc *inst_block, 378static void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block,
379 struct vm_gk20a *vm) 379 struct vm_gk20a *vm)
380{ 380{
381 u64 pdb_addr = gk20a_mem_get_base_addr(g, &vm->pdb.mem, 0); 381 u64 pdb_addr = gk20a_mem_get_base_addr(g, &vm->pdb.mem, 0);