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authorThomas Fleury <tfleury@nvidia.com>2018-03-14 20:54:56 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-16 20:11:52 -0400
commit0378bc32e4db87dd7bb58fce2f85cd4ff436506a (patch)
treefbb814c6b25b7f43fad265342d70541fbfba84c9 /drivers/gpu/nvgpu/gp10b/mm_gp10b.c
parent69252b3fb629d9534e7a9c4e3b75d3462653f00d (diff)
gpu: nvgpu: add coherent case in gp10b_get_pde0_pgsz
gp10b_get_pde0_pgsz computes pgsz depending on aperture and address, but it was not handling sysmem coherent case. Bug 2082475 Change-Id: I095acb05e3f917518368b879f5839f8e9dbcd8ea Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1676255 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/mm_gp10b.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 7ff5f6a6..86d5f5df 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -352,6 +352,7 @@ static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g,
352 * Check if the aperture AND address are set 352 * Check if the aperture AND address are set
353 */ 353 */
354 if (pde_v[2] & (gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f() | 354 if (pde_v[2] & (gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f() |
355 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f() |
355 gmmu_new_dual_pde_aperture_small_video_memory_f())) { 356 gmmu_new_dual_pde_aperture_small_video_memory_f())) {
356 u64 addr = (((u64) pde_v[3] << 32) | (u64) (pde_v[2] & 357 u64 addr = (((u64) pde_v[3] << 32) | (u64) (pde_v[2] &
357 gmmu_new_dual_pde_address_small_sys_f(~0))) << 358 gmmu_new_dual_pde_address_small_sys_f(~0))) <<
@@ -362,6 +363,7 @@ static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g,
362 } 363 }
363 364
364 if (pde_v[0] & (gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f() | 365 if (pde_v[0] & (gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f() |
366 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f() |
365 gmmu_new_dual_pde_aperture_big_video_memory_f())) { 367 gmmu_new_dual_pde_aperture_big_video_memory_f())) {
366 u64 addr = (((u64) pde_v[1] << 32) | (u64) (pde_v[0] & 368 u64 addr = (((u64) pde_v[1] << 32) | (u64) (pde_v[0] &
367 gmmu_new_dual_pde_address_big_sys_f(~0))) << 369 gmmu_new_dual_pde_address_big_sys_f(~0))) <<